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RT600 Datasheet(PDF) 129 Page - NXP Semiconductors |
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RT600 Datasheet(HTML) 129 Page - NXP Semiconductors |
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129 / 171 page ![]() RT600 All information provided in this document is subject to legal disclaimers. © NXP Semiconductors B.V. 2023. All rights reserved. Product data sheet Rev. 2.1 — 7 July 2023 129 of 173 NXP Semiconductors RT600 Dual-core microcontroller with 32-bit Cortex-M33 and Xtensa HiFi4 Audio DSP CPUs 14.15 DMIC subsystem [1] Based on simulated values. 14.16 SCTimer/PWM output timing Table 50. Dynamic characteristics[1] Tamb = 0C to 85 C; VDDIO_x = 1.71 V to 3.6 V; VDDCORE = 1.13 V; CL = 10 pF balanced loading on all pins; Input slew = 1 ns, SLEW set to standard mode for all pins; Bypass bit = 0 (PDM data in bypass mode); Parameters sampled at the 50% level of the rising or falling edge Symbol Parameter Conditions Min Typ Max Unit tDS data set-up time 13 - - ns tDH data hold time 0 - - ns Fig 26. DMIC timing diagram aaa-017025 CLOCK DATA tSU tDH Table 51. SCTimer/PWM output dynamic characteristics Tamb = -0 C to +85 C, VDDIO_x = 1.71 V to 1.89 V; VDDCORE = 1.13 V; CL = 10 pF. Simulated skew (over process, voltage, and temperature) of any two SCT fixed-pin output signals; sampled at the 50% level of the rising or falling edge; values guaranteed by design. Symbol Parameter Conditions Min Typ Max Unit tsk(o) output skew time - 0 - 2.8 ns |
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