TMPR4925 datasheet(481/590 Pages) TOSHIBA

481 / 590 page

Chapter 15 Interrupt Controller

15-31

15.4.20 Interrupt Request Internal Interrupt Mask Register (IRMASKINT)

0xF520

MINT

[31]

[30]

[29]

[28]

[27]

[26]

[25]

[24]

[23]

[22]

[21]

[20]

[19]

[18]

[17]

[16]

R/W

: Type

0x0000

: Initial value

MINT

[15]

[14]

[13]

[12]

[11]

[10]

[9]

[8]

[7]

[6]

[5]

[4]

[3]

[2]

[1]

[0]

R/W

: Type

0x0000

: Initial value

Bits

Mnemonic

Field Name

Explanation

31:0

MINT[31:0]

Internal Request

Mask

Internal Interrupt Mask (Initial value: 0x0000_0000, R/W)

These bits specify whether to use the corresponding flag bit as an internal interrupt

cause. Interrupt causes are masked when this bit is “0.”

0: Mask (Reset)

1: Do not mask

Figure 15.4.20 Interrupt Request Internal Interrupt Mask Register

15.4.21 Interrupt Request External Interrupt Mask Register (IRMASKEXT)

0xF524

MEXT MEXT MEXT MEXT MEXT MEXT MEXT MEXT MEXT MEXT MEXT MEXT MEXT MEXT MEXT MEXT

[31]

[30]

[29]

[28]

[27]

[26]

[25]

[24]

[23]

[22]

[21]

[20]

[19]

[18]

[17]

[16]

R/W

: Type

0x0000

: Initial value

MEXT MEXT MEXT MEXT MEXT MEXT MEXT MEXT MEXT MEXT MEXT MEXT MEXT MEXT MEXT MEXT

[15]

[14]

[13]

[12]

[11]

[10]

[9]

[8]

[7]

[6]

[5]

[4]

[3]

[2]

[1]

[0]

R/W

: Type

0x0000

: Initial value

Bits

Mnemonic

Field Name

Explanation

31:0

MEXT[31:0]

External Request

Mask

External Interrupt Mask (Initial value: 0x0000_0000, R/W)

These bits specify whether to use the corresponding flag bit as an external interrupt

cause. Interrupt causes are masked when this bit is “0.”

0: Mask (reset)

1: Do not mask

Figure 15.4.21 Interrupt Request External Interrupt Mask Register

TMPR4925 Datasheet(PDF) 481 Page - Toshiba Semiconductor

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