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TMPR4925 Datasheet(PDF) 484 Page - Toshiba Semiconductor |
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TMPR4925 Datasheet(HTML) 484 Page - Toshiba Semiconductor |
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484 / 590 page  Chapter 16 CHI Module 16-2 16.2 Block Diagram See Figure 16.2.1 for a block diagram of the CHI Module. The CHI Module consists of holding registers (both transmit and receive), shift registers (both transmit and receive), DMA support, and other logic to support interfacing to various types of TDM highways. Figure 16.2.1 CHI Module Block Diagram Control From CPU MSB VS LSB First Clock and Control Logic 8B TX Shift REG RX Hold Load CHICLK CHIFS CHIDOUT TXOE Data from DMA or CPU 32B TX Hold REG-B CHIDIN Data to DMA or CPU CLK CMP RX CH CNT TX Shift Load TX CH CNT CHI CTRL and STAT REG TX TDM Switch CTRL REG SYNCH PRGM Divider OUT REG 8 32 32 8 8 8 32B TX Hold REG-A RX TDM SWITCH CTRL REG 8B RX Shift REG 32B RX Hold REG-B 32B RX Hold REG-A PRGM Divider SYNCH SYNCH CMP MSB VS LSB First |
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