IMX93CEC datasheet(26/126 Pages) NXP

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i.MX 93 Application Processors Data Sheet for Commercial Products, Rev. 3, 12/2023

NXP Semiconductors

Electrical characteristics

NOTE

•

Automatic enter self-refresh when there is no DRAM access;

•

Put into self-refresh mode by software before entering low power mode;

•

Turn off externally by PMIC when PMIC_STBY_REQ signal is

asserted.

•

Remote wakeup can be supported if the USB PHY power is on in this

mode.

4.2.3

Chip power in different Low Power modes

Table 23 shows power consumption in different LP modes.

SYSTEM_PLL 1/2/3

OFF

XTAL

OFF

RTC

External DRAM device

Self-Refresh

OFF

USB PHY

In Low Power State

OFF

DRAM clock

266 MHz

OFF

NOC clock

133 MHz

OFF

AXI clock

133 MHz

OFF

Module clocks

ON as needed

OFF

EdgeLock® Secure Enclave

GPIO Wakeup

Yes

OFF

RTC Wakeup

Yes

USB remote wakeup

Yes

No1

Other wakeup source

Yes

No2

WAKEUPMIX

OFF3

OFF

MLMIX

OFF

NICMIX

ON as needed

OFF

1 USB remote wakeup can be “Yes” if required.

2 Other wakeup source can be “Yes” if required.

3 WAKEUPMIX can be “ON” if required.

Table 23. Chip power in different LP modes (Sheet 1 of 2)

Mode

Supply

Voltage (V)

Power (mW)1

BBSM

NVCC_BBSM_1P8

1.8

0.14

Table 22. Low power mode definition (continued)

IDLE

SUSPEND

BBSM

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