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PM7347 Datasheet(PDF) 208 Page - PMC-Sierra, Inc |
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PM7347 Datasheet(HTML) 208 Page - PMC-Sierra, Inc |
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208 / 341 page  S/UNI®-JET Data Sheet Released Proprietary and Confidential to PMC-Sierra, Inc., and for its Customers’ Internal Use 208 Document ID: PMC-1990267, Issue 3 Register 36DH: RXCP-50 Receive Cell Counter (MSB) Bit Type Function Default Bit 7 Unused X Bit 6 Unused X Bit 5 Unused X Bit 4 Unused X Bit 3 Unused X Bit 2 R RCELL[18] X Bit 1 R RCELL[17] X Bit 0 R RCELL[16] X RCELL[18:0] The RCELL[18:0] bits indicate the number of cells received and written into the receive FIFO during the last accumulation interval. Cells received and filtered due to HCS errors or Idle cell matches are not counted. The counter should be polled every second to avoid saturation. The contents of these registers are valid after 24 RCLK periods containing cell header or payload data (line or PLCP overhead periods do not count) after a transfer is triggered by a write to one of RXCP-50's performance monitor counters (Registers 369H – 371H) or to the S/UNI-JET Identification, Master Reset, and Global Monitor Update Register (006H). |
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