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PM7347 Datasheet(PDF) 218 Page - PMC-Sierra, Inc |
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PM7347 Datasheet(HTML) 218 Page - PMC-Sierra, Inc |
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218 / 341 page ![]() S/UNI®-JET Data Sheet Released Proprietary and Confidential to PMC-Sierra, Inc., and for its Customers’ Internal Use 218 Document ID: PMC-1990267, Issue 3 Register 384H: TXCP-50 Idle Cell Header Control Bit Type Function Default Bit 7 R/W GFC[3] 0 Bit 6 R/W GFC[2] 0 Bit 5 R/W GFC[1] 0 Bit 4 R/W GFC[0] 0 Bit 3 R/W PTI[2] 0 Bit 2 R/W PTI[1] 0 Bit 1 R/W PTI[0] 0 Bit 0 R/W CLP 1 CLP The CLP bit contains the eighth bit position of the fourth octet of the idle/unassigned cell pattern. Cell rate decoupling is accomplished by transmitting idle cells when the TXCP-50 detects that no outstanding cells exist in the transmit FIFO. PTI[3:0] The PTI[3:0] bits contains the fifth, sixth, and seventh bit positions of the fourth octet of the idle/unassigned cell pattern. Idle cells are transmitted when the TXCP-50 detects that no outstanding cells exist in the transmit FIFO. GFC[3:0] The GFC[3:0] bits contain the first, second, third, and fourth bit positions of the first octet of the idle/unassigned cell pattern. Idle/unassigned cells are transmitted when the TXCP-50 detects that no outstanding cells exist in the transmit FIFO. The all-zeros pattern is transmitted in the VCI and VPI fields of the idle cell. |
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