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PM7347 Datasheet(PDF) 215 Page - PMC-Sierra, Inc |
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PM7347 Datasheet(HTML) 215 Page - PMC-Sierra, Inc |
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215 / 341 page ![]() S/UNI®-JET Data Sheet Released Proprietary and Confidential to PMC-Sierra, Inc., and for its Customers’ Internal Use 215 Document ID: PMC-1990267, Issue 3 Register 382H: TXCP-50 Cell Count Status Bit Type Function Default Bit 7 R/W XFERE 0 Bit 6 R XFERI X Bit 5 R OVR X Bit 4 Unused X Bit 3 R/W Reserved 1 Bit 2 R/W Reserved 0 Bit 1 R/W Reserved 0 Bit 0 R/W Reserved 0 Reserved These bits should be set to their default values for proper operation XFERI The XFERI bit indicates that a transfer of Transmit Cell Count data has occurred. A logic one in this bit position indicates that the Transmit Cell Count Registers have been updated. This update is initiated by writing to one of the Transmit Cell Count Register locations or to the S/UNI-JET Identification, Master Reset, and Global Monitor Update Register. XFERI is set to logic zero when this register is read. OVR The OVR bit is the overrun status of the Transmit Cell Count Registers. A logic one in this bit position indicates that a previous transfer (indicated by XFERI being logic one) has not been acknowledged before the next accumulation interval has occurred and that the contents of the Transmit Cell Count Registers have been overwritten. OVR is set to logic zero when this register is read. XFERE The XFERE bit enables the generation of an interrupt when an accumulation interval is completed and new values are stored in the Transmit Cell Count Registers. When XFERE is set to logic one, the interrupt is enabled. |
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