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PM7347 Datasheet(PDF) 143 Page - PMC-Sierra, Inc |
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PM7347 Datasheet(HTML) 143 Page - PMC-Sierra, Inc |
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143 / 341 page ![]() S/UNI®-JET Data Sheet Released Proprietary and Confidential to PMC-Sierra, Inc., and for its Customers’ Internal Use 143 Document ID: PMC-1990267, Issue 3 Register 339H: E3 FRMR Maintenance Options Bit Type Function Default Bit 7 Unused X Bit 6 Unused X Bit 5 R/W WORDBIP 0 Bit 4 R/W Reserved 0 Bit 3 R/W WORDERR 0 Bit 2 R/W PYLD&JUST 0 Bit 1 R/W FERFDET 0 Bit 0 R/W TMARKDET 0 TMARKDET The TMARKDET bit determines the persistency check performed on the Timing Marker bit (bit 8 of the G.832 Maintenance and Adaptation byte). When TMARKDET is logic one, the Timing Marker bit must be in the same state for 5 consecutive frames before the TIMEMK status is changed to that state. When TMARKDET is logic zero, the Timing Marker bit must be in the same state for three consecutive frames. When a framing mode other than G.832 is selected, the setting of the TMARKDET bit is ignored. FERFDET The FERFDET bit determines the persistency check performed on the Far End Receive Failure (FERF) bit (bit 1 of the G.832 Maintenance and Adaptation byte) or on the RAI (RAI) bit (bit 11 of the frame in G.751 mode). When FERFDET is logic one, the FERF, or RAI, bit must be in the same state for 5 consecutive frames before the FERF/RAI status is changed to that state. When FERFDET is logic zero, the FERF, or RAI, bit must be in the same state for three consecutive frames. PYLD&JUST The PYLD&JUST bit selects whether the justification service bits and the tributary justification bits in framing mode G.751 is indicated as overhead or payload. When PYLD&JUST is logic one, the justification service bits and the tributary justification bits are indicated as payload to the SPLR. When PYLD&JUST is logic zero, the justification service and tributary justification bits are indicated as overhead to SPLR. For G.751 ATM applications, this bit must be set to logic one for correct cell mapping. |
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