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PM7347 Datasheet(PDF) 155 Page - PMC-Sierra, Inc |
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PM7347 Datasheet(HTML) 155 Page - PMC-Sierra, Inc |
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155 / 341 page ![]() S/UNI®-JET Data Sheet Released Proprietary and Confidential to PMC-Sierra, Inc., and for its Customers’ Internal Use 155 Document ID: PMC-1990267, Issue 3 Register 341H: E3 TRAN Status and Diagnostic Options Bit Type Function Default Bit 7 Unused X Bit 6 R/W PYLD&JUST 0 Bit 5 R/W CPERR 0 Bit 4 R/W DFERR 0 Bit 3 R/W DLCV 0 Bit 2 R/W Reserved 0 Bit 1 R/W TAIS 0 Bit 0 R/W NATUSE 1 NATUSE The NATUSE bit determines the default value of the National Use bit inserted into the G.751 E3 frame overhead. The value of the NATUSE bit is logically ORed with the bit collected once per frame from the internal HDLC transmitter (if TNETOP is set to logic one). When TNETOP is logic zero, the NATUSE bit controls the value of the National Use bit. When NATUSE is logic one, the National Use bit (bit 12 in G.751) is forced to logic one regardless of the bit input from the internal HDLC transmitter or the setting of TNETOP. When NATUSE is logic zero, the National Use bit is set to the value sampled from the internal HDLC transmitter if TNETOP is logic zero. Otherwise, the National Use bit will be set to logic zero. If the E3 TRAN is configured for G.832 mode, this bit is ignored. TAIS The TAIS bit enables AIS signal transmission. When TAIS is logic one, the all 1’s AIS signal is transmitted. When TAIS is logic zero, the normal data is transmitted. Reserved The Reserved bit must be programmed to logic zero for proper operation. DLCV The DLCV bit selects whether a LCV is generated for diagnostic purposes. When DLCV changes from logic zero to logic one, single LCV is generated; in HDB3, the LCV is generated by causing a bipolar violation pulse of the same polarity to the previous bipolar violation. To generate another LCV, the DLCV register bit must be first be written to logic zero and then to logic one again. |
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