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PM8621 Datasheet(PDF) 127 Page - PMC-Sierra, Inc |
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PM8621 Datasheet(HTML) 127 Page - PMC-Sierra, Inc |
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127 / 184 page ![]() NSE-8G™ Standard Product Data Sheet Preliminary Proprietary and Confidential to PMC-Sierra, Inc., and for its Customers’ Internal Use 126 Document ID: PMC-2010850, Issue 1 Register 800H: NSE-8G Master Test Bit Type Function Default Bit 31:6 R Unused X Bit 5 W PMCATST X Bit 4 W PMCTST X Bit 3 W DBCTRL 0 Bit 2 R/W IOTST 0 Bit 1 W HIZDATA 0 Bit 0 R/W HIZIO 0 This register is used to enable NSE-8G test features. All bits, except PMCTST, and PMCATST are reset to zero by a reset of the NSE-8G using the RSTB input. PMCTST is reset when CSB is high; PMCATST is reset when CSB is high and RSTB is low. PMCTST and PMCATST can also be reset by writing a logic 0 to the corresponding register bit. Access to this register is not affected by the Test Mode Address Force functions in registers 1001H and 1002H. HIZIO, HIZDATA The HIZIO and HIZDATA bits control the tri-state modes of the NSE-8G . While the HIZIO bit is a logic one, all output pins of the NSE-8G except the data bus and output TDO are held tri-state. The microprocessor interface is still active. While the HIZDATA bit is a logic one, the data bus is also held in a high-impedance state which inhibits microprocessor read cycles. The HIZDATA bit is overridden by the DBCTRL bit. IOTST The IOTST bit is used to allow normal microprocessor access to the test registers and control the test mode in each TSB block in the NSE-8G for board level testing. When IOTST is a logic one, all blocks are held in test mode and the microprocessor may write to a block’s test mode 0 registers to manipulate the outputs of the block and consequently the device outputs (refer to the “Test Mode 0 Details” in the “Test Features” section). DBCTRL The DBCTRL bit is used to pass control of the data bus drivers to the CSB pin. When the DBCTRL bit is set to logic one and PMCTST is set to logic one, the CSB pin controls the output enable for the data bus. While the DBCTRL bit is set, holding the CSB pin low causes the NSE-8G to drive the data bus and holding the CSB pin high tri-states the data bus. The DBCTRL bit overrides the HIZDATA bit. The DBCTRL bit is used to measure the drive capability of the data bus driver pads. |
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