PM8621 datasheet(125/184 Pages) PMC

125 / 184 page

NSE-8G™ Standard Product Data Sheet

Preliminary

Proprietary and Confidential to PMC-Sierra, Inc., and for its Customers’ Internal Use

124

Document ID: PMC-2010850, Issue 1

Bit

Type

Function

Default

Bit 31:0

Unused

Bit 15:7

Reserved

000000000

Bit 6

RX_TIMEOUTI

Bit 5

RX_THRSHLDI

Bit 4

RX_OVFLWI

Bit 3

RX_LINK_CHGI

Bit 2:1

RX_PAGE_CHGI[1:0]

Bit 0

RX_OUSER0_CHGI

This register contains the status of events that may be enabled to generate interrupts.

All bits in this register are cleared on read

RX_OUSER0_CHGI

A ‘1’ in this bit indicates that the last received value of the RX_USER[0] header bit has

changed from a ‘0’ to a ‘1’ from the previously received values. This bit is cleared on a read.

RX_PAGE_CHGI [1:0]

A ‘1’ in these bits indicates that the last received value of the corresponding RX_PAGE[1:0]

header bits has changed from the previously received values. These bits are cleared on read.

RX_LINK_CHGI

A ‘1’ in this bit indicates that the last received value of the LINK[1:0] header bits has

changed from the previously received values. This bit is cleared on a read.

RX_OVFLWI

This bit, when ‘1’, indicates a Receive FIFO Overflow. This bit is cleared on a read.

RX_THRSHLDI

This bit, when ‘1’, indicates a Receive FIFO Threshold reached. This bit is cleared on a read.

RX_TIMEOUTI

This bit, when ‘1’, indicates a Receive FIFO Timeout. This bit is cleared on read.

PM8621 Datasheet(PDF) 125 Page - PMC-Sierra, Inc

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