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PM8621 Datasheet(PDF) 122 Page - PMC-Sierra, Inc |
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PM8621 Datasheet(HTML) 122 Page - PMC-Sierra, Inc |
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122 / 184 page ![]() NSE-8G™ Standard Product Data Sheet Preliminary Proprietary and Confidential to PMC-Sierra, Inc., and for its Customers’ Internal Use 121 Document ID: PMC-2010850, Issue 1 Register 116h + N*20H, ILC Interrupt Enable and Control Register Bit Type Function Default Bit 31:16 Unused X Bit 15:13 R Reserved 000 Bit 12:11 R/W RX_TIMEOUT_VAL[1:0] 00 Bit 10:8 R/W RX_THRESHOLD_VAL[2:0] 101 Bit 7 R Reserved 0 Bit 6 R/W RX_TIMEOUTE 0 Bit 5 R/W RX_THRSHLDE 0 Bit 4 R/W RX_OVFLWE 0 Bit 3 R/W RX_LINK_CHGE 0 Bit 2:1 R/W RX_PAGE_CHGE[1:0] 0 Bit 0 R/W RX_USER0_CHGE 0 RX_USER0_CHGE Writing a ‘1’ to the RX_OUSER0_CHGE bit enables the generation of an interrupt on a change of state from a ‘0’ to a ‘1’ of received message header bit RX_USER[0]. RX_PAGE_CHGE[1:0] Writing a ‘1’ to the RX_PAGE_CHGE[n] bit enables the generation of an interrupt on a change of state of the received PAGE bits. The RX_PAGE bits that changed value are indicated by a ‘1’ in the corresponding RX_PAGE_CHGI[n]. RX_LINK_CHGE Writing a ‘1’ to the RX_LINK_CHGE bit enables the generation of an interrupt on a change of state of the received LINK bits. When either of the received LINK bits has changed value the RX_LINK_CHGI bit will be set to a ‘1’. If the RXFIFO level had reached the threshold value an interrupt will be generated if this bit is ‘1’. To disable set to ‘0’. RX_OVFLWE Writing a ‘1’ to the RX_OVFLWE bit enables the generation of an interrupt when RX_OVFLWI is a ‘1’. RX_THRSHLDE Writing a ‘1’ to the RX_THRSHLDE bit enables the generation of an interrupt when RX_THRSHLDI is a ‘1’ |
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