PM8621 datasheet(144/184 Pages) PMC

144 / 184 page

NSE-8G™ Standard Product Data Sheet

Preliminary

Proprietary and Confidential to PMC-Sierra, Inc., and for its Customers’ Internal Use

143

Document ID: PMC-2010850, Issue 1

234

RC1FP (ext)

NSE C1FP

(int)

NSE Frame

Interrupt

Enable Frame

Interrupt

Write new SBS

page words

Write new DCB

page bit and

disable Frame

interrupt

NSE CPU

tasks

SBS sample

new bit

SBS samples new page

bits and set up page

switch

Switch occurs in the SBS

DCB sample

new bit

Switch occurs in the NSE

NSE DCB samples CMP

bit and set up page switch

outgoing

messages

outgoing

messages

12.5 Controlling Frame Alignment in the Receive Port

After external data corruption on any port it may be necessary to force OCA to reset the

alignment of the R8TD block. In order to detect this out of alignment condition, three hardware

functions are implemented for each port. The registers are:

• “Correct R8TD_RX_C1 Pulse Monitor”, 012h

• “Unexpected R8TD_RX_C1 Pulse Interrupt”, 013h

• “Missing R8TD_RX_C1 Pulse Interrupt”, 014h

These are qualified against a delayed version of the RC1FP input, which should occur every 4 or

48 frames and in agreement with mf_swap mode (DCB Configuration Register, 04Ch). If all

active ports are using carrying the same frequency of C1 frame pulses (1 in 4 or 1 in 48) then the

unexpected interrupt (013h) should be used to signal that a C1 code word was detected at the

wrong time, software can then poll the monitor register (012h) to see if the error condition is

permanent.

PM8621 Datasheet(PDF) 144 Page - PMC-Sierra, Inc

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