TMPR4937 datasheet(390/552 Pages) TOSHIBA

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Chapter 12 Timer/Counter

12-6

12.3.5 Pulse Generator Mode

When in the Pulse Generator mode, use Compare Register A (TMCPRAn) and Compare Register B

(TMCPRBn) to output a particular period and particular duty square wave to the TIMER[n] signal.

Setting the Timer Mode field (TMTCRn.TMODE) of the Timer Control Register to “01” sets the timer

to the Pulse Generator mode. Timer 0 and Timer 1 can be used, but Timer 2 cannot.

The initial state of the TIMER[n] signal can be set by the Flip Flop Default bit (TMPGMRn.FFI) of

the Pulse Generator Mode Register.

The TIMER[n] output signal reverses when the counter value matches the value set in Compare

counter continues counting and the value set in Compare Register B (TMCPRBn) and the counter value

match. Consequently, a value greater than that in Compare Register A (TMCPRAn) must not be set in

Compare Register B (TMCPRBn).

Interrupts can be generated in the Pulse Generator mode as well. However, this is not standard

practice.

The Pulse Generator TMCPRA Status bit (TMTISRn.TPIAS) of the Timer Interrupt Status Register is

set when the count value matches the value of Compare Register A (TMCPRAn). Timer interrupts are

generated when the TMCPRA Interrupt Enable bit (TMPGMRn.TPIAE) of the Pulse Generator Mode

Similarly, the Pulse Generator TMCPRB Status bit (TMTISRn.TPIBS) of the Timer Interrupt Status

interrupts are generated when the TMCPRB Interrupt Enable bit (TMPGMRn.TPIBE) of the Pulse

Generator Mode Register is set.

Figure 12.3.3 Operation Example of the Pulse Generator Mode

Count Value

0x000000

TCE = 1

TIMER[n]

Time

TCE = 1

TMCPRBn

Compare Value

TMCPRAn

Compare Value

TMODE1 = 01 (Pulse Generator Mode), CCS= 0 (Internal Clock)

FFI = 1 (Initial High), CRE = 0 (Counter Reset Disable)

TCE = 0

TMPR4937 Datasheet(PDF) 390 Page - Toshiba Semiconductor