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TMPR4937 Datasheet(PDF) 489 Page - Toshiba Semiconductor |
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TMPR4937 Datasheet(HTML) 489 Page - Toshiba Semiconductor |
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489 / 552 page ![]() Chapter 15 Interrupt Controller 15-43 15.4.20 Interrupt Request Internal Interrupt Mask Register (IRMASKINT) 0xF520 31 16 Reserved : Type : Default 15 14 13 12 11 10 9 8 7 6 5 4 3 2 1 0 MINT MINT MINT MINT MINT MINT MINT MINT MINT MINT MINT MINT MINT MINT MINT MINT [15] [14] [13] [12] [11] [10] [9] [8] [7] [6] [5] [4] [3] [2] [1] [0] R/W : Type 0x0000 : Default Bit Mnemonic Field Name Explanation Read/Write 31:16 ⎯ ⎯ Reserved ⎯ 15:0 MINT [15:0] Internal Request Mask Internal Interrupt Mask (Default: 0x0000) These bits specify whether to use the corresponding flag bit as an internal interrupt cause. Interrupt causes are masked when this bit is “0.” 0: Mask (Reset) 1: Do not mask R/W Figure 15.4.20 Interrupt Request Internal Interrupt Mask Register |
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