TMPR4938 datasheet(483/716 Pages) TOSHIBA

483 / 716 page

Chapter 15 Interrupt Controller

15-19

15.4.5 Interrupt Level Register (IRLVL1)

0xF614

Reserved

IL19

Reserved

IL18

R/W

: Type

000

: Default

Reserved

IL3

Reserved

IL2

R/W

: Type

000

: Default

Bit

Mnemonic

Field Name

Explanation

Read/Write

31:27

⎯

Reserved

⎯

26:24

IL19

Interrupt Level 19

Interrupt Level of INT [19] (Default: 000)

These bits specify the interrupt level of TMR [2].

000: Interrupt level 0 (Interrupt disable)

001: Interrupt level 1

010: Interrupt level 2

011: Interrupt level 3

100: Interrupt level 4

101: Interrupt level 5

110: Interrupt level 6

111: Interrupt level 7

R/W

23:19

⎯

Reserved

⎯

18:16

IL18

Interrupt Level 18

Interrupt Level of INT [18] (Default: 000)

These bits specify the interrupt level of TMR[1].

000: Interrupt level 0 (Interrupt disable)

001: Interrupt level 1

010: Interrupt level 2

011: Interrupt level 3

100: Interrupt level 4

101: Interrupt level 5

110: Interrupt level 6

111: Interrupt level 7

R/W

15:11

⎯

Reserved

⎯

10:8

IL3

Interrupt Level 3

Interrupt Level of INT [3] (Default: 000)

These bits specify the interrupt level of external INT[1].

000: Interrupt level 0 (Interrupt disable)

001: Interrupt level 1

010: Interrupt level 2

011: Interrupt level 3

100: Interrupt level 4

101: Interrupt level 5

110: Interrupt level 6

111: Interrupt level 7

R/W

7:3

⎯

Reserved

⎯

Figure 15.4.5 Interrupt Level Register 1 (1/2)

TMPR4938 Datasheet(PDF) 483 Page - Toshiba Semiconductor

TMPR4938 Datasheet(HTML) 483 Page - Toshiba Semiconductor

Html Pages

1 2 3 4 5 6 7 8 9 10 11 12 13 14 15 16 17 18 19 20 21 22 23 24 25 26 27 28 29 30 31 32 33 34 35 36 37 38 39 40 41 42 43 44 45 46 47 48 49 50 51 52 53 54 55 56 57 58 59 60 61 62 63 64 65 66 67 68 69 70 71 72 73 74 75 76 77 78 79 80 81 82 83 84 85 86 87 88 89 90 91 92 93 94 95 96 97 98 99 100 ...More

Datasheet Download

Link URL