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TMPR4938 Datasheet(PDF) 78 Page - Toshiba Semiconductor |
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TMPR4938 Datasheet(HTML) 78 Page - Toshiba Semiconductor |
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78 / 716 page  Chapter 4 Address Mapping 4-6 Table 4.2.3 Internal Registers (3/12) Offset Address Register Size (bit) Register Symbol Register Name PCI Controller for ETHERC (PCIC1) 0x7120 64 G2PM0GBASE G2P Memory Space 0 G-bus Base Address Register 0x7128 64 G2PM1GBASE G2P Memory Space 1 G-bus Base Address Register 0x7130 64 G2PM2GBASE G2P Memory Space 2 G-bus Base Address Register 0x7138 64 G2PIOGBASE G2P I/O Space G-bus Base Address Register 0x7140 32 G2PM0MASK G2P Memory Space 0 Address Mask Register 0x7144 32 G2PM1MASK G2P Memory Space 1 Address Mask Register 0x7148 32 G2PM2MASK G2P Memory Space 2 Address Mask Register 0x714C 32 G2PIOMASK G2P I/O Space Address Mask Register 0x7150 64 G2PM0PBASE G2P Memory Space 0 PCI Base Address Register 0x7158 64 G2PM1PBASE G2P Memory Space 1 PCI Base Address Register 0x7160 64 G2PM2PBASE G2P Memory Space 2 PCI Base Address Register 0x7168 64 G2PIOPBASE G2P I/O Space PCI Base Address Register 0x7170 32 PCICCFG PCI Controller Configuration Register 0x7174 32 PCICSTATUS PCI Controller Status Register 0x7178 32 PCICMASK PCI Controller Interrupt Mask Register 0x7180 64 P2GM0GBASE P2G Memory Space 0 G-bus Base Address Register 0x7188 64 P2GM1GBASE P2G Memory Space 1 G-bus Base Address Register 0x7190 64 P2GM2GBASE P2G Memory Space 2 G-bus Base Address Register 0x7198 64 P2GIOGBASE P2G I/O Space G-bus Base Address Register 0x71A0 32 G2PCFGADRS G2P Configuration Address Register 0x71A4 32 G2PCFGDATA G2P Interrupt Acknowledge Data Register 0x71C8 32 G2PINTACK G2P Interrupt Acknowledge Data Register 0x71CC 32 G2PSPC G2P Special Cycle Data Register |
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