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TMPR4938 Datasheet(PDF) 491 Page - Toshiba Semiconductor |
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TMPR4938 Datasheet(HTML) 491 Page - Toshiba Semiconductor |
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491 / 716 page ![]() Chapter 15 Interrupt Controller 15-27 Bit Mnemonic Field Name Explanation Read/Write 2:0 IL10 Interrupt Level 10 Interrupt Level of INT [10] (Default: 000) These bits specify the interrupt level of DMA0 [0] interrupts. 000: Interrupt level 0 (Interrupt disabled) 001: Interrupt level 1 010: Interrupt level 2 011: Interrupt level 3 100: Interrupt level 4 101: Interrupt level 5 110: Interrupt level 6 111: Interrupt level 7 R/W Figure 15.4.9 Interrupt Level Register 5 (2/2) |
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