LTM4682 datasheet(69/130 Pages) AD

69 / 130 page

LTM4682

Rev. A

For more information www.analog.com

APPLICATIONS INFORMATION

parameters defined by JESD51-12 or provided in the Pin

Configuration section replicates or conveys normal oper-

ating conditions of a µModule regulator. For example, in

normal board-mounted applications, never does 100%

of the device’s total power loss (heat) thermally conduct

exclusively through the top or exclusively through the

bottom of the µModule package—as the standard defines

for θJCtop and θJCbottom, respectively. In practice, power

loss is thermally dissipated in both directions away from

the package—granted, in the absence of a heat sink and

airflow, a majority of the heat flow is into the board.

Within the LTM4682, be aware that there are multiple

power devices and components dissipating power, with

the consequence that the thermal resistances relative to

different junctions of components or die are not exactly

linear to total package power loss. To reconcile this com-

plication without sacrificing modeling simplicity—but

also, not ignoring practical realities—an approach has

been taken using FEA software modeling along with lab-

oratory testing in a controlled-environment chamber to

reasonably define and correlate the thermal resistance

values supplied in this data sheet: (1) Initially, FEA soft-

ware is used to accurately build the mechanical geometry

of the LTM4682 and the specified PCB with all of the cor-

rect material coefficients along with accurate power loss

source definitions; (2) this model simulates a software-

defined JEDEC environment consistent with JESD51-9

and JESD51-12 to predict power loss heat flow and

temperature readings at different interfaces that enable

the calculation of the JEDEC-defined thermal resistance

values; (3) the model and FEA software is used to evalu-

ate the LTM4682 with heat sink, and airflow; (4) having

solved for and analyzed these thermal resistance values

and simulated various operating conditions in the soft-

ware model, a thorough laboratory evaluation replicates

the simulated conditions with thermocouples within

a controlled environment chamber while operating the

device at the same power loss as that which was sim-

ulated. The outcome of this process and due diligence

yields the set of derating curves provided in later sections

of this data sheet, along with well-correlated JESD51-12-

defined θ values provided in the Pin Configuration section

of this data sheet.

The 5V, 8V, and 12V power loss curves in Figure 35,

Figure 36, and Figure 37, respectively, can be used in coor-

dination with the load current derating curves in Figure 41

to Figure 46 for calculating an approximate θJA thermal

resistance for the LTM4682 with various airflow condi-

tions and without heat sinks. These thermal resistances

represent the demonstrated performance of the LTM4682

on hardware, an 8-layer FR4 PCB measuring 215mm ×

160mm × 1.6mm using 2oz copper on all layers. The

power loss curves are taken at room temperature, and

are increased with multiplicative factors of 1.35 when the

junction temperature reaches 125°C. The derating curves

are plotted with the LTM4682’s paralleled outputs initially

sourcing up to 120A and the ambient temperature at 25°C.

The output voltages are 0.75V, 1V and 1.35V. These are

chosen to include the lower and higher output voltage

ranges to correlate the thermal resistance. Thermal mod-

els are derived from several temperature measurements

in a controlled temperature chamber, along with thermal

modeling analysis. The junction temperatures are moni-

tored while the ambient temperature is increased with

and without airflow.

The power loss increase with ambient temperature

change is factored into the derating curves. The junc-

tions are maintained at 125°C maximum while lower-

ing output current or power while increasing ambient

temperature. The decreased output current decreases

the internal module loss as the ambient temperature is

increased. The monitored junction temperature of 125°C

minus the ambient operating temperature specifies how

much module temperature rise can be allowed. As an

example in Figure 43, the load current is derated to ~80A

at ~67°C ambient with no air or heat sink, and the room

temperature (25°C) power loss for this 12VIN to 1VOUT at

80AOUT condition is ~9.7W. A 13.1W loss is calculated by

multiplying the ~9.7W room temperature loss from the

12VIN to 1VOUT power loss curve at 80A (Figure 37), with

the 1.35 multiplying factor. If the 67°C ambient tempera-

ture is subtracted from the 125°C junction temperature,

then the difference of 58°C divided by 13.1W yields a

thermal resistance, θJA, of 4.4°C/W—in good agreement

with the value derived from thermal simulation shown

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