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LTM4682 Datasheet(PDF) 11 Page - Analog Devices

Part # LTM4682
Description  Low Profile Quad 31.25A or Single 125A μModule Regulator with Digital Power System Management
PDF  130 Pages
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Manufacturer  AD [Analog Devices]
Direct Link  http://www.analog.com
Logo AD - Analog Devices

LTM4682 Datasheet(HTML) 11 Page - Analog Devices

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11
LTM4682
Rev. A
For more information www.analog.com
ELECTRICAL CHARACTERISTICS
Note 5: VOUTn (DC) and line and load regulation tests are performed in
production with digital servo disengaged (MFR_PWM_MODEn[6] = 0b),
and low VOUTn range selected MFR_PWM_MODEn[1] = 1b. The digital
servo control loop is exercised in production (setting MFR_PWM_
MODEn[6] = 1b). However, the convergence of the output voltage to its
final settling value is not necessarily observed in the final test—due to
potentially long-time constants involved—and is instead guaranteed
by the output voltage readback accuracy specification. Evaluation
in application demonstrates capability; see the Typical Performance
Characteristics section.
Note 6: See the Thermal Considerations and Output Current Derating
section for VIN, VOUT, and TA, located in the Applications
Information section.
Note 7: Part tested with PWM disabled. Evaluation in application
demonstrates capability. The TUE(%) = ADC Gain Error (%) + 100 (zero-
code offset + ADC Linearity Error)/Actual Value.
Note 8: Minimum on-time is tested at wafer sort.
Note 9: The data conversion is done by default in a round-robin fashion.
All input signals are continuously converted for a typical latency of 90ms.
Setting MFR_ADC_CONTRL value to be 0 to 12, LTM4682 can do fast
data conversion with only 8ms to 10ms. See the PMBus Command
Summary section for details.
Note 10: The following telemetry parameters are formatted in PMBus-
defined Linear Data Format, in which each register contains a word
comprised of 5 most significant bits—representing a signed exponent, to
be raised to the power of 2—and 11 least significant bits—representing
a signed mantissa: input voltage (on SVIN_nn), accessed through the
READ_VIN command code; output currents (IOUTn), accessed through the
READ_IOUTn command codes; module input current (IVIN_nn + IVIN_nn +
ISVIN_nn), accessed through the READ_IIN command code; channel input
currents (IVIN_nn + 1/2 • ISVIN_nn), accessed through the MFR_READ_IINn
command codes; and duty cycles of Channel 0 and Channel 1 switching
power stages, accessed through the READ_DUTY_CYCLEn command
codes. This data format limits the resolution of telemetry readback data to
10 bits even though the internal ADC is 16 bits and the LTM4682’s internal
calculations use 32-bit words.
Note 11: The absolute maximum rating for the SVIN_nn pin is 18V. The
input voltage telemetry (READ_VIN) is obtained by digitizing a voltage
scaled down from the SVIN_nn pin.
Note 12: These typical parameters are based on bench measurements and
are not production tested.
Note 13: Channel 0 to Channel 3 OV/UV comparator threshold accuracy
for 0.7V to 1.35V are 3%.
Note 14: Tested at IC-level ATE.
Note 15: The LTM4682’s EEPROM temperature range for valid write
commands is 0°C to 85°C. To achieve guaranteed EEPROM data retention,
execution of the STORE_USER_ALL command—i.e., uploading RAM
contents to NVM—outside this temperature range is not recommended.
However, as long as the LTM4682’s EEPROM temperature is less than
130°C, the LTM4682 will obey the STORE_USER_ALL command. Only
when EEPROM temperature exceeds 130°C, the LTM4682 will not act
on any STORE_USER_ALL transactions; instead, the LTM4682 NACKs
the serial command and asserts its relevant CML (communications,
memory, logic) fault bits. The EEPROM temperature can be queried
before commanding STORE_USER_ALL; see the Applications
Information section.
Note 16: The LTM4682 includes overtemperature protection that is
intended to protect the device during momentary overload conditions. The
junction temperature will exceed 125°C when overtemperature protection
is active. Continuous operation above the specified maximum operating
junction temperature may impair device reliability.
Figure 1. Programmable RCOMPn
CODE
0
5
10
15
20
25
30
35
0
6
12
19
25
31
37
43
50
56
62
4682 F01



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