LTM4682 datasheet(16/130 Pages) AD

16 / 130 page

LTM4682

Rev. A

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PIN FUNCTIONS

output capacitors from this shape to GND. See the Layout

Checklist/Example section.

VOUT2_CFG (AA8): Output Voltage Select Pin for VOUT2,

Coarse Setting. If the VOUT2_CFG and VTRIM2_CFG pins

are both left open—or, if the LTM4682 is configured to

ignore pin-strap (RCONFIG) resistors, i.e., MFR_CONFIG_

ALL[6] = 1b—then the LTM4682s target VOUT2 output

voltage setting (VOUT_COMMAND2) and associated

power-good and OV/UV warning and fault thresholds are

dictated at SVIN_23 power-up according to the LTM4682’s

NVM contents. A resistor divider connected to 2.5V and

to SGND to this pin—in combination with resistor pin

settings on VTRIM2_CFG, and using the factory-default

NVM setting of MFR_CONFIG_ALL[6] = 0b—can be

used to configure the LTM4682’s Channel 2 output to

power-up to a VOUT_COMMAND value (and associated

output voltage monitoring and protection/fault-detection

thresholds) different from those of NVM contents. See the

Applications Information section. Connecting resistor(s)

from VOUT2_CFG to SGND and/or VTRIM2_CFG to SGND

in this manner allows a convenient way to configure mul-

tiple LTM4682s with identical NVM contents for different

output voltage settings all without GUI intervention or

the need to custom-preprogram module NVM contents.

Minimize capacitance especially when the pin is left open

to ensure accurate detection of the pin state. Note that

the use of RCONFIGs on VOUT2_CFG/VTRIM2_CFG can

affect the VOUT2 range setting (MFR_PWM_MODE0[1])

and loop gain. For addressed ASEL_23, Page 0x00 cor-

responds to Channel 2 and Page 0x01 corresponds to

Channel 3. See PAGE description section.

FSWPH_23_CFG (AA9): Switching Frequency, Channel

Phase-Interleaving Angle and Phase Relationship to SYNC

Configuration Pin for Channels 2 and 3. If this pin is left

open—or, if the LTM4682 is configured to ignore pin-

strap (RCONFIG) resistors, i.e., MFR_CONFIG_ALL[6] =

1b—then LTM4682’s switching frequency (FREQUENCY_

SWITCH) and channel phase relationships (with respect

to the SYNC clock; MFR_PWM_CONFIG[2:0]) are dictated

at SVIN_23 power-up according to the LTM4682’s NVM

contents for Channels 2 and 3. Default factory values

are 575kHz operation; Channel 2 at 0°; and Channel 3 at

180°C (convention throughout this document: a phase

angle of 0° means the channel’s switch node rises coinci-

dent with the falling edge of the SYNC pulse). Connecting a

resistor divider from 2.5V to SGND (and using the factory-

default NVM setting of MFR_CONFIG_ALL[6] = 0b) allows

a convenient way to configure multiple LTM4682s with

identical NVM contents for different switching frequen-

cies of operation and phase interleaving angle settings of

intra- and extra-module-paralleled channels—all, with-

out GUI intervention or the need to custom pre-program

module NVM contents. See the Applications Information

section. Minimize capacitance, especially, when the pin

is left open, to ensure accurate detection of the pin state.

ASEL_23 (AA10): Serial Bus Address Configuration Pin

for Channels 2 and 3 Controller. On any given I2C/SMBus

serial bus segment, every device must have its unique

subordinate address. If this pin is left open, the LTM4682

powers up to its default subordinate address of 0x4F

(hexadecimal), i.e., 1001111b (industry-standard conven-

tion is used throughout this document: 7-bit subordinate

addressing). The lower 4 bits of the LTM4682’s subordi-

nate address can be altered from this default value by con-

necting a resistor from this pin to SGND. Minimize capaci-

tance—especially when the pin is left open—to ensure

accurate detection of the pin state. It is recommended to

use a resistor to set the address. The ASEL_23 address

will be used to address Channels 2 and 3, and a differ-

ent ASEL_01 address will be used to address Channels 0

and 1. For addressed ASEL_23, Page 0x00 corresponds to

Channel 2 and Page 0x01 corresponds to Channel 3. See

PAGE description section. The GUI will represent Channel

2 as U1:B0 and Channel 3 as U1:B1. See the LTpowerPlay

Screen Shot (Figure 31).

VOUT3_CFG (AB8): Output Voltage Select Pin for VOUT3,

Coarse Setting. If the VOUT3_CFG and VTRIM3_CFG pins

are both left open—or, if the LTM4682 is configured to

ignore pin-strap (RCONFIG) resistors, i.e., MFR_CONFIG_

ALL[6] = 1b, then the LTM4682s target VOUT3 output

voltage setting (VOUT_COMMAND3) and associated

power-good and OV/UV warning and fault thresholds are

dictated at SVIN_23 power-up according to the LTM4682’s

NVM contents. A resistor divider connected to 2.5V and

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