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LTM4682 Datasheet(PDF) 28 Page - Analog Devices

Part # LTM4682
Description  Low Profile Quad 31.25A or Single 125A μModule Regulator with Digital Power System Management
PDF  130 Pages
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Manufacturer  AD [Analog Devices]
Direct Link  http://www.analog.com
Logo AD - Analog Devices

LTM4682 Datasheet(HTML) 28 Page - Analog Devices

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LTM4682
28
Rev. A
For more information www.analog.com
OPERATION
and FAULT3, outputs are provided. Each FAULTn can be
masked independently.
Six dedicated pins for ALERT_01, ALERT_23, PGOOD0,
PGOOD1, PGOOD2, and PGOOD3 functions are provided.
The shutdown operation also allows all faults to be indi-
vidually masked and can be operated in either unlatched
(hiccup) or latched modes.
Individual status commands enable fault reporting over
the serial bus to identify the specific fault event. Fault or
warning detection includes the following:
n
Output Undervoltage/Overvoltage
n
Input Undervoltage/Overvoltage
n
Input and Output Overcurrent
n
Internal Overtemperature
n
Communication, Memory or Logic (CML) Fault
EEPROM WITH ECC
The LTM4682 contains internal EEPROM with ECC to
store user configuration settings and fault log information
for Channels 0 and 1, and Channels 2 and 3. The EEPROM
endurance retention and mass write operation time are
specified in the Electrical Characteristics and Absolute
Maximum Ratings sections. Write operations above TJ =
85°C are possible although the Electrical Characteristics
are not guaranteed and the EEPROM will be degraded.
Read operations performed at temperatures between
–40°C and 125°C will not degrade the EEPROM. Writing
to the EEPROM above 85°C will result in degrading reten-
tion characteristics. The fault logging function, which is
useful in debugging system problems that may occur
at high temperatures, only writes to fault log EEPROM
locations. If occasional writes to these registers occur
above 85°C, the slight degradation in the data retention
characteristics of the fault log will not take away from the
usefulness of the function.
It is recommended that the EEPROM not be written when
the die temperature is greater than 85°C. If the die tem-
perature exceeds 130°C, the LTM4682 will disable all
EEPROM write operations. All EEPROM write operations
will be re-enabled when the die temperature drops below
125°C. The controller will also disable all the switching
when the die temperature exceeds the internal overtem-
perature fault limit 160°C with a 10°C hysteresis.
The degradation in EEPROM retention for temperatures
>125°C can be approximated by calculating the dimen-
sionless acceleration factor using the following equation:
AF
= e
Ea
k
⎛
⎝⎜
⎞
⎠⎟
•
1
TUSE+273
–
1
TSTRESS+273
⎛
⎝⎜
⎞
⎠⎟
⎡
⎣
⎢
⎤
⎦
⎥
where:
AF = acceleration factor
Ea = activation energy = 1.4eV
k = 8.617 • 10–5 eV/K
TUSE = 125°C specified junction temperature
TSTRESS = actual junction temperature in °C
Example: Calculate the effect on retention when operating
at a junction temperature of 130°C for 10 hours.
TSTRESS = 130°C
TUSE = 125°C,
AF = e([(1.4/8.617 • 10
–5) • (1/398 – 1/403)] ) = 1.66
The equivalent operating time at 125°C = 16.6 hours.
Thus the overall retention of the EEPROM was degraded
by 6.6 hours as a result of operating at a junction tempera-
ture of 130°C for 10 hours. The effect of the overstress is
negligible when compared to the overall EEPROM reten-
tion rating of 87,600 hours at a maximum junction tem-
perature of 125°C.
The integrity of the entire onboard EEPROM is checked with
a CRC calculation each time its data is to be read, such as
after a power-on reset or execution of a RESTORE_USER_
ALL command. If a CRC error occurs, the CML bit is set in
the STATUS_BYTE and STATUS_WORD commands, the
EEPROM CRC Error bit in the STATUS_MFR_SPECIFIC
command is set, and the ALERT and RUN pins pulled
low (PWM channels off). At that point the device will only
respond at a special address 0x7C, which is activated
only after an invalid CRC has been detected. The chip
will also respond at the global addresses 0x5A and 0x5B,
but using these addresses when attempting to recover



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