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ISM330BXTR Datasheet(PDF) 38 Page - STMicroelectronics |
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ISM330BXTR Datasheet(HTML) 38 Page - STMicroelectronics |
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38 / 150 page  Qvar data can be stored in FIFO (by setting the AH_QVAR_BATCH_EN bit to 1 in the COUNTER_BDR_REG1 (0Bh) register) and can also be processed by MLC/FSM logic. The equivalent input impedance of the Qvar buffers can be selected by properly setting the AH_QVAR_C_ZIN_[1:0] bits in the CTRL7 (16h) register. Finally, the AH_QVAR_SW bit in the CTRL10 (19h) register allows internally swapping the input electrodes connected to the AH1/QVAR1 and AH2/QVAR2 pins. 6.7 Block diagram of filters Figure 23. Block diagram of filters ADC1 ADC2 Low-Pass Gyro UI Low-Pass Qvar dedicated filter Low-Pass TDM XL Regs array, FIFO interface Interrupt mng TDM interface Voltage and current references Trimming circuit and Test interface Clock and phase generator Power management FTP CS SCL/SPC SDA/SDI/SDO SDO/TA0 WCLK BCLK TDMout INT1 INT2 M E M S S E N S O R Low-Pass UI XL Gyro UI front-end XL UI/TDM front-end Temperature sensor & Qvar I2C/ /SPI MIPI I3C® ADC3 ISM330BX Functionality DS14588 - Rev 2 page 38/150 |
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