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PCM5121 Datasheet(PDF) 101 Page - Texas Instruments |
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PCM5121 Datasheet(HTML) 101 Page - Texas Instruments |
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101 / 121 page ![]() 101 PCM5121, PCM5122 www.ti.com SLAS763C – AUGUST 2012 – REVISED OCTOBER 2018 Product Folder Links: PCM5121 PCM5122 Submit Documentation Feedback Copyright © 2012–2018, Texas Instruments Incorporated 0: VREF mode (Constant output amplitude against AVDD variation) 1: VCOM mode (Output amplitude is proportional to AVDD variation) Table 122. Page 1 / Register 2 Dec Hex b7 b6 b5 b4 b3 b2 b1 b0 2 02 RSV RSV RSV LAGN RSV RSV RSV RAGN Reset Value 0 0 RSV Reserved Reserved. Do not access. LAGN Analog Gain Control for Left Channel This bit controls the left channel analog gain. Default value: 0 0: 0 dB 1:-6 dB RAGN Analog Gain Control for Right Channel This bit controls the right channel analog gain. Default value: 0 0: 0 dB 1: -6 dB Table 123. Page 1 / Register 5 Dec Hex b7 b6 b5 b4 b3 b2 b1 b0 5 05 RSV RSV RSV RSV RSV RSV UEPD UIPD Reset Value 0 0 RSV Reserved Reserved. Do not access. UEPD External UVP Control This bit enables or disables detection of power supply drop via XSMUTE pin (External Under Voltage Protection). Default value: 0 0: Enabled 1: Disabled UIPD Internal UVP Control This bit enables or disables internal detection of AVDD voltage drop (Internal Under Voltage Protection). Default value: 0 0: Enabled 1: Disabled Table 124. Page 1 / Register 6 Dec Hex b7 b6 b5 b4 b3 b2 b1 b0 6 06 RSV RSV RSV RSV RSV RSV RSV AMCT Reset Value 0 RSV Reserved Reserved. Do not access. AMCT Analog Mute Control This bit enables or disables analog mute following digital mute. Default value: 0 |
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