AM625 datasheet(166/276 Pages) TI2

166 / 276 page

6.12.5.12 I2C

The device contains six multicontroller Inter-Integrated Circuit (I2C) controllers. Each I2C controller was

designed to be compliant to the Philips I2C-bus™ specification version 2.1. However, the device IOs are not

fully compliant to the I2C electrical specification. The speeds supported and exceptions are described per IO

buffer type. See the BUFFER TYPE column of the Pin Attributes table to determine which IO buffer type is

associated with a specific I2C instance.

• LVCMOS or SDIO

– Speeds:

• Standard-mode (up to 100Kbits/s)

– 1.8V

– 3.3V

• Fast-mode (up to 400Kbits/s)

– 1.8V

– 3.3V

– Exceptions:

• The IOs associated with these ports are not compliant to the fall time requirements defined in the I2C

specification because they are implemented with higher performance LVCMOS push-pull IOs that were

designed to support other signal functions that could not be implemented with I2C compatible IOs. The

LVCMOS IOs being used on these ports are connected such they emulate open-drain outputs. This

emulation is achieved by forcing a constant low output and disabling the output buffer to enter the Hi-Z

state.

• The I2C specification defines a maximum input voltage VIH of (VDD

max + 0.5V), which exceeds the

absolute maximum ratings for the device IOs. The system must be designed to ensure the I2C signals

never exceed the limits defined in the Absolute Maximum Ratings section of this datasheet.

• I2C OD FS

– Speeds:

• Standard-mode (up to 100Kbits/s)

– 1.8V

– 3.3V

• Fast-mode (up to 400Kbits/s)

– 1.8V

– 3.3V

• Hs-mode (up to 3.4Mbits/s)

– 1.8V

– Exceptions:

• The IOs associated with these ports were not design to support Hs-mode while operating at 3.3V. So

Hs-mode is limited to 1.8V operation.

• The rise and fall times of the I2C signals connected to these ports must not exceed a slew rate of

0.08V/ns (or 8E+7V/s). This limit is more restrictive than the minimum fall time limits defined in the I2C

specification. Therefore, it may be necessary to add additional capacitance to the I2C signals to slow

the rise and fall times such that they do not exceed a slew rate of 0.08V/ns.

• The I2C specification defines a maximum input voltage VIH of (VDD

max + 0.5V), which exceeds the

absolute maximum ratings for the device IOs. The system must be designed to ensure the I2C signals

never exceed the limits defined in the Absolute Maximum Ratings section of this datasheet.

Note

I2C3 have one or more signals which can be multiplexed to more than one pin. Timing requirements

and switching characteristics defined in this section are only valid for specific pin combinations known

as IOSETs. Valid pin combinations or IOSETs for this interface are defined in the SysConfig-PinMux

Tool.

Refer to the Philips I2C-bus specification version 2.1 for timing details.

AM625, AM625-Q1, AM623, AM620-Q1

SPRSP58C – JUNE 2022 – REVISED OCTOBER 2025

www.ti.com

166

Submit Document Feedback

Product Folder Links: AM625 AM625-Q1 AM623 AM620-Q1

AM625 Datasheet(PDF) 166 Page - Texas Instruments

AM625 Datasheet(HTML) 166 Page - Texas Instruments

Html Pages

1 2 3 4 5 6 7 8 9 10 11 12 13 14 15 16 17 18 19 20 21 22 23 24 25 26 27 28 29 30 31 32 33 34 35 36 37 38 39 40 41 42 43 44 45 46 47 48 49 50 51 52 53 54 55 56 57 58 59 60 61 62 63 64 65 66 67 68 69 70 71 72 73 74 75 76 77 78 79 80 81 82 83 84 85 86 87 88 89 90 91 92 93 94 95 96 97 98 99 100 ...More

Datasheet Download

Link URL