AM625 datasheet(108/276 Pages) TI2

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6.12.2.2.2 Power-Down Sequencing

Table 6-6 and Figure 6-6 describes the device power-down sequencing.

Note

The power supply sequencing requirements defined in this section does not include entry or exit

from low power modes. See Section 6.12.2.2.3, Partial IO Power Sequencing for more information on

power supply sequence requirements when entering or exiting low power modes.

Note

All power rails must be turned off and decay below 300mV before initiating a new power-up

sequence anytime a power rail drops below the minimum value defined in Recommended

Operating Conditions. The only exception is when entering/exiting Partial IO low power mode with

VDDSHV_CANUART and VDD_CANUART sourced from an always on power source. For this use

case the VDDSHV_CANUART and VDD_CANUART power rails are allowed to remain on.

Table 6-6. Power-Down Sequencing – Supply / Signal Assignments

See: Figure 6-6

WAVEFORM

SUPPLY / SIGNAL NAME

VSYS, VMON_VSYS

VDDSHV_CANUART(1), VDDSHV_MCU(1), VDDSHV0(1), VDDSHV1(1), VDDSHV2(1), VDDSHV3(1), VDDA_3P3_USB,

VMON_3P3_SOC

VDDSHV_CANUART(2), VDDSHV_MCU(2), VDDSHV0(2), VDDSHV1(2), VDDSHV2(2), VDDSHV3(2), VDDA_MCU,

VDDS_OSC0, VDDA_PLL0, VDDA_PLL1, VDDA_PLL2, VDDA_1P8_CSIRX0, VDDA_1P8_OLDI0, VDDA_1P8_USB,

VDDA_TEMP0, VDDA_TEMP1, VMON_1P8_SOC

VDDSHV4(3), VDDSHV5(3), VDDSHV6(3)

VDDS_DDR, VDDS_DDR_C

VDD_CANUART(4)

VDD_CANUART(5), VDD_CORE(5), VDDA_CORE_CSIRX0(5), VDDA_CORE_USB0(5), VDDA_DDR_PLL0(5)

VDD_CANUART(6), VDD_CORE(6), VDDA_CORE_CSIRX0(6), VDDA_CORE_USB0(6), VDDA_DDR_PLL0(6),

VDDR_CORE

VPP

MCU_PORz

MCU_OSC0_XI, MCU_OSC0_XO

(1)

VDDSHV_CANUART, VDDSHV_MCU, and VDDSHVx [x=0-3] when operating at 3.3V.

(2)

VDDSHV_CANUART, VDDSHV_MCU, and VDDSHVx [x=0-3] when operating at 1.8V.

(3)

VDDSHV4, VDDSHV5, and VDDSHV6 were designed to support power-up, power-down, or dynamic voltage change without any

dependency on other power rails. This capability is required to support UHS-I SD Cards.

(4)

VDD_CANUART when connected to an always-on power source for Partial IO low power mode.

(5)

VDD_CANUART, VDD_CORE, VDDA_CORE_CSIRX0, VDDA_CORE_USB0, and VDDA_DDR_PLL0 when operating at 0.75V

(6)

VDD_CANUART, VDD_CORE, VDDA_CORE_CSIRX0, VDDA_CORE_USB0, and VDDA_DDR_PLL0 when operating at 0.85V

AM625, AM625-Q1, AM623, AM620-Q1

SPRSP58C – JUNE 2022 – REVISED OCTOBER 2025

www.ti.com

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