41 / 70 page

41 of 70
RF6001
Rev A3 DS050929
7628 Thorndike Road, Greensboro, NC 27409-9421 · For sales or technical
support, contact RFMD at (+1) 336-678-5570 or sales-support@rfmd.com.
Part of the POLARIS™ TOTAL RADIO™ Solution
Controlling Initial Data Flow
The RF6001 can be configured to control the dummy bits and guard bits that occur before the tail bits of the burst. The
RF6001 can also be configured to allow the user to control these bits instead.
The block diagram shown below is a useful representation of how the data flow works within the RF6001 for this functionality.
The actual system has other control modes but for the purposes of this discussion only this part is shown.
TX_DATA is the data flow from the FIFO or the serial interface
DE_INIT is the initial state of the differential encoder system set from SDI.
Clkx96 is the 26MHz system clock.
sample_mdi is the internal trigger signal that reads TX_DATA
GCNT_done is an internal trigger signal that signifies that the “garbage count” is completed.
TX_DE selects internal differential encoding or not.
G_DEF is the default states of the modulator when not selected for active data.
MD_DLY1 triggers when active data is released to the modulators.
D
Q
D
Q
TX_DE
01
0
0
0
0
1
1
1
1
TX_DATA
DE_INIT
clkx96
sample_mdi
GCNT_done
To GMSK
Modulator
G_DEF
01
GCNT_done