RF6001 datasheet(59/70 Pages) RFMD

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RF6001

Rev A3 DS050929

7628 Thorndike Road, Greensboro, NC 27409-9421 · For sales or technical

support, contact RFMD at (+1) 336-678-5570 or sales-support@rfmd.com.

Part of the POLARIS™ TOTAL RADIO™ Solution

PLL Register x2 (PLLx2) - Address 000111

TX Modulation Register (TXMOD) - Address 001000

PA Ramp Register 1 (PARMP1) - Address 001001

PA Ramp Register 2 (PARMP2) - Address 001010

Location

Bit Name

Default

Function

PLLx2(17:16)

FBASE(1:0)

Base Frequency

00=FBASE is 0Hz

01=FBASE is 832MHz

1x=FBASE is 1664MHz

See the OFFS register description for more information on setting the

PLL/VCO frequency.

PLLx2(15:11)

CT_DEF(4:0)

VCO Coarse Tune Coefficient

PLLx2(10:8)

CT_MOFFS(2:0)

VCO Coarse Tune Offset

PLLx2(7:6)

CTN(1:0)

VCO Coarse Tune Type

00=3 bits

01=4 bits (Internal VCO1 or External RF2722 VCO)

10=5 bits (Internal VCO2)

11=reserved

PLLx2(5:0)

KV_DEF(5:0)

20h

KV Calibration Setting

Location

Bit Name

Default

Function

TXMOD(17)

TXAD

TX Interface Mode

0=analog TX interface

1=digital TX interface

TXMOD(16)

reserved

reserved, program to zero (0)

TXMOD(15)

TX_DE

Differential Encoder, used with digital TX interface

0=input data on MDI is not differentially encoded

1=input data on MDI is differentially encoded

TXMOD(14)

TX_INV

Symbol Polarity after differential encoding

0=data is not inverted

1=data is inverted

TXMOD(13:8)

PHADJ(5:0)

Symbol Clock Phase Offset

offset=(PHADJ/13)

μs

TXMOD(7:4)

TX_THP(3:0)

TX Analog Interface, positive threshold

TX_

TXMOD(3:0)

TX_THN(3:0)

TX Analog Interface, negative threshold

TX_

Location

Bit Name

Default

Function

PARMP1(17:10)

PAT(7:0)

9Ah

PA Ramp Delay, delay time from the rising edge on the TXST pin to the start of

the ramp. Delay=PAT*(12/13)

μs.

PARMP1(9:0)

PAG(9:0)

3AEh

PA Ramp Gain, used as a scaling factor on the PA Ramp Waveform

Gain=(PAG/1024)

Location

Bit Name

Default

Function

PARMP2(17)

TXENIO

TXEN pin direction

0=TXEN is input

1=TXEN is output, generated by PA ramping system

PARMP2(16)

PAEN

PA Ramp Enable

0=disabled, DAC1 is controlled by DAC1EN and DAC1V

1=enabled, DAC1 is controlled by PA ramp control system, initiated by a rising

edge on TXEN or TXST pins

PARMP2(15:14)

reserved

reserved, program to zero (0)

PARMP2(13:6)

TXENU(7:0)

98h

TXEN rising edge delay from TXST

Delay=TXENU*(12/13)

μs

PARMP2(5:0)

TXEND(5:0)

TXEN falling edge delay from end of PA ramp

Delay=TXEND*(12/13)

μs

THP

12.5 V

⋅

()

≈

–

THN

12.5 V

⋅

()

≈

–

RF6001 Datasheet(PDF) 59 Page - RF Micro Devices

RF6001 Datasheet(HTML) 59 Page - RF Micro Devices

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