TCC76x
Specification Rev. 0.07
February 23, 2005
32-bit RISC Microprocessor for Digital Media Player
GSIO PORT
Preliminary
11-4
Refer to the figure for a basic wave form of GSIO operation.
GSIO Global Control Register (GSGCR)
0x8000070C
31
30
29
28
27
26
25
24
23
22
21
20
19
18
17
16
0
15
14
13
12
11
10
9
8
7
6
5
4
3
2
1
0
G3
G2
G1
G0
IEN3
IEN2
IEN1
IEN0
FLG3
FLG2
FLG1
FLG0
Busy3 Busy2 Busy1
Busy0
G[3:0] [15:12]
GPIO_B[23:21] Other Function Signal Select
if bit n is 1 (n=0~3)
FRM, SCK, SDO of GSIOn can be come out from
GPIO_B[23:21]
*) If multiple bit of G[3:0] is set to 1, the output of each GSIO is ORed and come out from
GPIO_B[23:21]. It is needed to configure the GPIO_B[23:21] as GSIO port to use these output.
IEN[3:0] [11:8]
GSIO Interrupt Enable
if bit n is 1 (n=0~3)
Enable GSIOn Interrupt
0
Disable GSIOn Interrupt
*) The master flag to enable GSIO interrupt is GS bit of IEN register in interrupt controller. User
must set that flag ahead as well as these fields.
FLG[3:0] [7:4]
Type
GSIO Interrupt Flag
R
Indicates that GSIOn operation (read/write) has
been completed.
if bit n is 1 (n=0~3)
W
Clear FLG[n] field
*) If an interrupt of a GSIO is enabled, GSIO interrupt is generated when the GSIO operation is
completed.
These FLGn can be used to distinguish which GSIO has generated the interrupt. These flags are
cleared by writing “1” at the corresponding flag.
Busy[3:0] [3:0]
GSIO Cycle Busy Flag
if bit n is 0
Indicates that the transmission and reception of GSIOn have
finished, and can process another serial data.
if bit n is 1
Indicates that the transmission and reception of GSIOn is in
operation, so it cannot process another serial data.
The following figures illustrate the representative waveforms about the various GSIO
operations.
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