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TCC76x
Specification Rev. 0.07
February 23, 2005
32-bit RISC Microprocessor for Digital Media Player
I2C CONTROLLER
Preliminary
17-3
Transmit Register (TXR)
0x80000808
31
30
29
28
27
26
25
24
23
22
21
20
19
18
17
16
0
15
14
13
12
11
10
9
8
7
6
5
4
3
2
1
0
Transmit Data
When CTRL[5] is set, in case of 16Bit Mode is selected, Transmit Data bit width become 16 bit. Default mode is
8bit mode.
Command Register (CMD)
0x8000080C
31
30
29
28
27
26
25
24
23
22
21
20
19
18
17
16
0
15
14
13
12
11
10
9
8
7
6
5
4
3
2
1
0
0
STA STO
RD
WR ACK RESERVE IACK
STA [7]
Start Condition Generation
0
Disabled
1
Enabled
STO [6]
Stop Condition Generation.
0
Disabled
1
Enabled
RD [5]
Read From Slave
0
Disabled
1
Enabled
WR [4]
Write to Slave
0
Disabled
1
Enabled
ACK [3]
Sent ACK
0
Enabled
1
Disabled
IACK [0]
Interrupt Acknowledge
0
-
1
Clear a pending interrupt
Receive Register (RXR)
0x80000810
31
30
29
28
27
26
25
24
23
22
21
20
19
18
17
16
0
15
14
13
12
11
10
9
8
7
6
5
4
3
2
1
0
Receive Data
When CTRL[5] is set, in case of 16Bit Mode is selected, Receive Data bit width become 16 bit. Default mode is
8bit mode.
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