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TCC76x
Specification Rev. 0.07
February 23, 2005
32-bit RISC Microprocessor for Digital Media Player
ELECTRICAL SPECIFICATION
Preliminary
23-4
Parameter
Symbol
Test Conditions
MIN
TYP
MAX
Unit
Output Enable to Output High-Z
tOHZ
25
ns
Output Hold Time
tOH
0
ns
Address Setup Time
tAS
0
ns
Address Hold Time
tAH
45
ns
Data Setup Time
tAS
35
ns
Data Hold Time
tAH
0
ns
Chip Enable Setup Time
tCS
0
ns
Chip Enable Hold Time
tCH
0
ns
Output Enable Setup Time
tOES
0
ns
Output Enable Hold Time
tOEH
10
ns
Write Enable Pulse Width
tWP
40
ns
Write Enable Pulse Width High
tWPH
30
ns
Notes:
1.
Measurement Condition: CL = 30pF, Input Rise/Fall Time = 5.0ns
2.
Before accessing the NOR Flash, the CSCFG3 register must be programmed appropriately to meet the
above timing parameters. (Refer to section “Memory Controller”).
3.
Actual access timing is determined by the value of the CSCFG3 register and Memory Controller clock
(HCLK) frequency.
Not all parameters are tested. Guaranteed by design characterization.
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