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TPS25751AS Datasheet(PDF) 42 Page - Texas Instruments |
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TPS25751AS Datasheet(HTML) 42 Page - Texas Instruments |
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42 / 85 page ![]() The device behavior is determined in several ways depending upon the decoded value of the ADCIN1 and ADCIN2 pins. The following table shows the decoded values for different resistor divider ratios. See Pin Strapping to Configure Default Behavior for details on how the ADCINx configurations determine default device behavior. See I2C Address Setting for details on how ADCINx decoded values affects default I2C target address. Table 8-2. Decoding of ADCIN1 and ADCIN2 Pins DIV = RDOWN / (RUP + RDOWN)(1) Without Using RUP or RDOWN ADCINx Decoded Value(2) MIN Target MAX 0 0.0114 0.0228 tie to GND 0 0.0229 0.0475 0.0722 N/A 1 0.0723 0.1074 0.1425 N/A 2 0.1425 0.1899 0.2372 N/A 3 0.2373 0.3022 0.3671 N/A 4 0.3672 0.5368 0.7064 tie to LDO_1V5 5 0.7065 0.8062 0.9060 N/A 6 0.9061 0.9530 1.0 tie to LDO_3V3 7 (1) See I2C Address Setting to see the exact meaning of I2C Address Index. (2) See Pin Strapping to Configure Default Behavior for how to configure a given ADCINx decoded value. TPS25751A SLVSJG7 – MAY 2026 www.ti.com 42 Submit Document Feedback Copyright © 2026 Texas Instruments Incorporated Product Folder Links: TPS25751A |
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