TPS25751AS datasheet(48/85 Pages) TI2

48 / 85 page

Target Address

Data Byte

Start condition

Repeated start condition

Read (bit value of 1)

Write (bit value of 0

Field is required to have the value x

Acknowledge (this bit position is either 0 for an ACK or 1 for a NACK)

Stop condition

Controller-to-target

Target-to-controller

Continuation of protocol

Figure 8-31. I2C Read/Write Protocol Key

8.3.10.2.1.4 Pin Strapping to Configure Default Behavior

During the boot procedure, the device reads the ADCINx pins and set the configurations based on the table

below. The device then attempts to load a configuration from an external EEPROM on the I2Cc bus. If no

EEPROM is detected, then the device waits for an external host to load a configuration.

When an external EEPROM is used, each device is connected to a unique EEPROM, and cannot be shared for

multiple devices. The external EEPROM is set at 7-bit target address 0x50.

Table 8-6. Device Configuration using ADCIN1 and ADCIN2

ADCIN1 DECODED

VALUE(2)

ADCIN2 DECODED

VALUE(2)

I2C ADDRESS

INDEX(1)

DEAD BATTERY BOOT CONFIGURATION

AlwaysEnableSink: The device always enables the sink path

regardless of the amount of current the attached source is

offering. USB PD is disabled until configuration is loaded. This

configuration is used with an external embedded controller. The

embedded controller manages the battery charger in the system

when present.

SafeMode: The device does not enable the sink path. USB

PD is disabled until configuration is loaded. Note that the

configuration can put the device into a source-only mode. This

is recommended when the application loads the patch from

EEPROM. SafeMode is recommended when the PD controller

manages the battery charger when present.

(1)

See Table 8-5 to see the exact meaning of I2C Address Index.

(2)

See Decoding of ADCIN1 and ADCIN2 for how to configure a given ADCINx decoded value.

TPS25751A

SLVSJG7 – MAY 2026

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