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ADMV4530 Datasheet(PDF) 36 Page - Analog Devices

Part # ADMV4530
Description  Dual-Mode, Ka Band Upconverter with Integrated Fractional-N PLL and VCO
PDF  64 Pages
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Manufacturer  AD [Analog Devices]
Direct Link  http://www.analog.com
Logo AD - Analog Devices

ADMV4530 Datasheet(HTML) 36 Page - Analog Devices

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Data Sheet
ADMV4530
THEORY OF OPERATION
analog.com
Rev. C | 36 of 64
I/Q MODE MIXER SETUP
In baseband quadrature modulation mode, the input impedance of
the baseband pins (IN, IP, QN, and QP) are 100 Ω differential.
These inputs can be driven with a dc-coupled 100 Ω differential
source. IN and IP are the differential baseband I inputs, and QN
and QP are the differential baseband Q inputs. These inputs can
operate from a common-mode voltage range of 0 V to 2.5 V. When
operating in I/Q mode, program the following registers:
►
Register 0x100 = 0x3A
►
Register 0x101 = 0x78
►
Register 0x102 = 0x11
►
Register 0x103 = 0x5D (for 0.5 V VCM)
►
Register 0x106 to 0x109 = 0x7F
►
Register 0x115 = 0x88
When VCM changes, program Register 0x103 by using the following
formulas for each mode.
In I/Q mode, for VCM = 0.0 V to 1.5 V, set MIXER_VCM =
ROUND(23.8 × VCM + 80.7).
In I/Q mode, for VCM = 1.5 V to 2.5 V, set MIXER_VCM =
ROUND(23.8 × VCM + 1.3).
The I/Q mode default for VCM = 0.5 V is MIXER_VCM = 93 = 0x5D.
I/Q MODE LO NULLING
To perform LO nulling in I/Q mode, apply a differential dc offset
on the I and Q inputs. Note that LO nulling is a two-step process.
When LO nulling is done on the I side, keep the Q side at VCM,
and when LO nulling is done on the Q side, the I side must be kept
at VCM or at the determined value in the first step. The optimal LO
null is when settings from the I side and the Q side are combined.
It is important to keep VCM constant. Therefore, when a dc offset
is applied on the negative input (VCMN), the same offset must be
applied on the positive input (VCMP) in the opposite direction (VCMP
± dc offset and VCMN
∓ dc offset) to allow the average VCM to
hold constant to coincide with the value programmed in Register
0x103. LO nulling at a single point is optimal at that particular
frequency and temperature, and the absolute level (dBm) of the LO
to RF feedthrough remains the same across gain settings using the
VCTR_RF input.
For example, it is possible to null LO down to −50 dBm with
VCTR_RF = 1.8 V, depending on the resolution of the dc offset
applied and the temperature (as shown in Figure 28 and Figure 29),
where LO nulling = 29 GHz. When LO nulling = 29 GHz, the LO to
RF feedthrough is <−20 dBm over temperature, and the frequency
range is from 28 GHz to 30 GHz.
I/Q MODE SIDEBAND REJECTION NULLING
In I/Q mode, use Register 0x104 or Register 0x105 to perform
sideband rejection nulling. Each register has 128 settings, Bits[6:0].
Single frequency nulling allows sideband rejection to null down
to −45 dBc for a particular frequency. The sideband rejection de-
grades to −35 dBc if the frequency or temperature changes (shown
in Figure 27 and Figure 30).
IF GAIN CONTROL
As shown in the functional block diagram (see Figure 1), the
ADMV4530 incorporates an IF amplifier with analog gain control.
The analog voltage for this IF amplifier can either be provided by
the internal AGC loop or by applying an external VCTR_IF voltage
to the EXT_CAP_N (Pin 10). The voltage range for the IF amplifier
gain control is 0 V to 3.3 V, with a negatively sloping linear region
between 0.9 V and 2.2 V, as shown in Figure 38. The typical slope
within linear region is −32 dB/V.
IF MODE MIXER SETUP
The ADMV4530 features the ability to upconvert a real IF input
anywhere from 2 GHz to 3 GHz. When operating in IF mode
program the following registers:
►
Register 0x100 = 0x03
►
Register 0x101 = 0x7D
►
Register 0x102 = 0x3F
►
Register 0x103 = 0x5B (this register sets VCM in IF mode)
►
Register 0x104 to 0x109 = 0x5F
►
Register 0x115 = 0x08
When VCM changes, program Register 0x103 by using the following
formula:
MIXER_VCM = ROUND(0.3 × (128 − TARGET_MIX-
ER_DC_OFFSET) + 80.7)
(21)
where TARGET_MIXER_DC_OFFSET is the value programmed
into Register 0x106 to Register 0x109.



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