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ADMV4530 Datasheet(PDF) 38 Page - Analog Devices

Part # ADMV4530
Description  Dual-Mode, Ka Band Upconverter with Integrated Fractional-N PLL and VCO
PDF  64 Pages
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Manufacturer  AD [Analog Devices]
Direct Link  http://www.analog.com
Logo AD - Analog Devices

ADMV4530 Datasheet(HTML) 38 Page - Analog Devices

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Data Sheet
ADMV4530
APPLICATIONS INFORMATION
analog.com
Rev. C | 38 of 64
IF AGC CONFIGURATION
The ADMV4530 includes an AGC circuit on the IF input port. The
four bit fields that control the functionality of this AGC follow:
1. AGC_EN (Register 0x101)
2. AGC_EN_OVERRIDE (Register 0x102)
3. IF_DET_EN_OVERRIDE (Register 0x102)
4. DET_RANGE (Register 0x10C)
5. AGC_VREF_GEN (Register 0x10D)
The AGC_EN bit enables or disables the AGC that is only truly
enabled when in power-down mode. The AGC_EN_OVERRIDE
and IF_DET_EN_OVERRIDE bits enable the AGC and detector
regardless of the power-down mode.
The DET_RANGE bit field selects the appropriate range for the
internal power detector, and the AGC_VREF_GEN bit field deter-
mines the voltage reference set point for the AGC.
Figure 95 shows an example of the output power vs. the input pow-
er level for various settings of DET_RANGE and AGC_VREF_GEN.
The first number in the Figure 95 legend is the DET_RANGE
setting (decimal value), and the second number in the Figure 95
legend is the AGC_VREF_GEN setting (decimal value).
Figure 95. Power Sweep for Various AGC Settings
Figure 96 shows the output power given a −20 dBm input IF signal
and sweeping the AGC voltage reference set point for various
DET_RANGE settings.
Figure 96. AGC Voltage Reference Sweep
When AGC is enabled, the AGC voltage needed for the IF gain
control is accessible on the EXT_CAP_N pin (Pin 10). When the
AGC is disabled, this pin functions as an input for the IF amplifier
gain control.
ERROR VECTOR MAGNITUDE PERFORMANCE
The error vector magnitude performance of the ADMV4530 is
measured at an RF frequency of 29.98 GHz (fractional mode,
phase noise adjusted as shown in Figure 93) and an RF frequency
of 30 GHz (integer mode) with a single 12 MHz, 8 quadrature phase
shifting keying (QPSK) carrier in I/Q mode, 0 Hz offset, 0.2 roll-off
factor, and LO and sideband rejection nulled. The measurement
was performed at TA = 25°C.
Figure 97 shows the transmitter error vector magnitude vs. the
output power. The transmitter has an approximately 3% error vector
magnitude with an output power of 12 dBm.
Figure 97. Error Vector Magnitude vs. Output Power, 8 QPSK Modulation,
12 MHz Bandwidth



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