ADMV4530 datasheet(55/64 Pages) AD

55 / 64 page

Data Sheet

ADMV4530

analog.com

Rev. C | 55 of 64

Table 46. Bit Descriptions for REG0033

Bits

Bit Name

Description

Reset

Recommended

Access

[7:5]

VCO_FSM_READBACK

VCO Finite State Machine Read Back.

0x0

R/W

000: checkerboard.

001: read back core and band.

101: ADC reading (temperature sensor).

[4:0]

SYNTH_LOCK_TIMEOUT

Synthesizer Lock Timeout. See the Autocalibration Lock Time section for

details.

0x0

User defined

R/W

Address: 0x034, Reset: 0x00, Name: REG0034

Table 47. Bit Descriptions for REG0034

Bits

Bit Name

Description

Reset

Recommended

Access

[7:5]

VCO_FSM_TEST_MODES

VCO Finite State Machine Test Modes.

0x0

0x4

R/W

000: normal operation.

010: manual overwrite VCO core and band.

100: manual overwrite of VCO calibration voltage.

[4:0]

VCO_ALC_TIMEOUT

VCO ALC Timeout. Keep this bit set to 0.

0x0

R/W

Address: 0x035, Reset: 0x00, Name: REG0035

Table 48. Bit Descriptions for REG0035

Bits

Bit Name

Description

Reset

Recommended

Access

[7:0]

ADC_CLK_DIVIDER

ADC Clock Divider. ADC Clock = fPFD/((ADC_CLK_DIVIDER × 4) + 2).

0x0

0xFF

R/W

Address: 0x036, Reset: 0x00, Name: REG0036

Table 49. Bit Descriptions for REG0036

Bits

Bit Name

Description

Reset

Recommended

Access

[7:0]

ICP_ADJUST_OFFSET

Reserved

0x0

0x30

R/W

Address: 0x037, Reset: 0x00, Name: REG0037

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