ADMV4530 datasheet(61/64 Pages) AD

61 / 64 page

Data Sheet

ADMV4530

analog.com

Rev. C | 61 of 64

Table 64. Bit Descriptions for REG0105

Bits

Bit Name

Description

Reset

Recommended

Access

RESERVED

Reserved.

0x0

R/W

[6:0]

PHASE_ADJ_Q

LO Phase Adjustment Path Q

0x5F

R/W

Address: 0x106, Reset: 0x7F, Name: REG0106

Table 65. Bit Descriptions for REG0106

Bits

Bit Name

Description

Reset

Recommended

Access

RESERVED

Reserved.

0x0

R/W

[6:0]

MIXER_DC_OFFSET_IP

Mixer DC Offset Adjustment IP. For I/Q mode, the default = 127 = 0x7F. For IF

mode, the default = 95 = 0x5F.

0x7F

I/Q mode: 0x7F, IF

mode: 0x5F

R/W

Address: 0x107, Reset: 0x7F, Name: REG0107

Table 66. Bit Descriptions for REG0107

Bits

Bit Name

Description

Reset

Recommended

Access

RESERVED

Reserved.

0x0

R/W

[6:0]

MIXER_DC_OFFSET_IN

Mixer DC Offset Adjustment IN. In I/Q mode, the default = 127 = 0x7F. For IF

mode, the default = 95 = 0x5F.

0x7F

I/Q mode: 0x7F, IF

mode: 0x5F

R/W

Address: 0x108, Reset: 0x7F, Name: REG0108

Table 67. Bit Descriptions for REG0108

Bits

Bit Name

Description

Reset

Recommended

Access

RESERVED

Reserved.

0x0

R/W

[6:0]

MIXER_DC_OFFSET_QP

Mixer DC Offset Adjustment QP. For I/Q mode, the default = 127 = 0x7F. For IF

mode, the default = 95 = 0x5F.

0x7F

I/Q mode: 0x7F, IF

mode: 0x5F

R/W

Address: 0x109, Reset: 0x7F, Name: REG0109

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