C167CS datasheet(27/517 Pages) INFINEON

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C167CS

Derivatives

Architectural Overview

User’s Manual

2-10

V2.0, 2000-07

External Bus Interface

In order to meet the needs of designs where more memory is required than is provided

on chip, up to 16 MBytes of external RAM and/or ROM can be connected to the

microcontroller via its external bus interface. The integrated External Bus Controller

(EBC) allows to access external memory and/or peripheral resources in a very flexible

way. For up to five address areas the bus mode (multiplexed/demultiplexed), the data

bus width (8-bit/16-bit) and even the length of a bus cycle (waitstates, signal delays) can

be selected independently. This allows to access a variety of memory and peripheral

components directly and with maximum efficiency. If the device does not run in Single

Chip Mode, where no external memory is required, the EBC can control external

accesses in one of the following external access modes:

• 16-/18-/20-/24-bit Addresses, 16-bit Data, Demultiplexed

• 16-/18-/20-/24-bit Addresses, 8-bit Data, Demultiplexed

• 16-/18-/20-/24-bit Addresses, 16-bit Data, Multiplexed

• 16-/18-/20-/24-bit Addresses, 8-bit Data, Multiplexed

The demultiplexed bus modes use PORT1 for addresses and PORT0 for data input/

output. The multiplexed bus modes use PORT0 for both addresses and data input/

output. Port 4 is used for the upper address lines (A16 …) if selected.

Important timing characteristics of the external bus interface (waitstates, ALE length and

Read/Write Delay) have been made programmable to allow the user the adaption of a

wide range of different types of memories and/or peripherals. Access to very slow

memories or peripherals is supported via a particular ‘Ready’ function.

For applications which require less than 64 KBytes of address space, a non-segmented

memory model can be selected, where all locations can be addressed by 16-bits, and

thus Port 4 is not needed as an output for the upper address bits (Axx … A16), as is the

case when using the segmented memory model.

The on-chip XBUS is an internal representation of the external bus and allows to access

integrated application-specific peripherals/modules in the same way as external

components. It provides a defined interface for these customized peripherals.

The on-chip XRAM and the on-chip CAN-Modules are examples for these X-Peripherals.

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