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C167CS Datasheet(PDF) 68 Page - Infineon Technologies AG |
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C167CS Datasheet(HTML) 68 Page - Infineon Technologies AG |
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68 / 517 page ![]() C167CS Derivatives The Central Processing Unit (CPU) User’s Manual 4-18 V2.0, 2000-07 regardless of whether the V-flag is set to ‘1’ or not. Since logical ALU operations cannot produce an invalid result, the V-flag is cleared by these operations. The V-flag is also used as ‘Sticky Bit’ for rotate right and shift right operations. With only using the C-flag, a rounding error caused by a shift right operation can be estimated up to a quantity of one half of the LSB of the result. In conjunction with the V-flag, the C-flag allows evaluating the rounding error with a finer resolution (see Table 4-2). For Boolean bit operations with only one operand the V-flag is always cleared. For Boolean bit operations with two operands the V-flag represents the logical ORing of the two specified bits. Z-Flag: The Z-flag is normally set to ‘1’, if the result of an ALU operation equals zero, otherwise it is cleared. For the addition and subtraction with carry the Z-flag is only set to ‘1’, if the Z-flag already contains a ‘1’ and the result of the current ALU operation additionally equals zero. This mechanism is provided for the support of multiple precision calculations. For Boolean bit operations with only one operand the Z-flag represents the logical negation of the previous state of the specified bit. For Boolean bit operations with two operands the Z-flag represents the logical NORing of the two specified bits. For the prioritize ALU operation the Z-flag indicates, if the second operand was zero or not. E-Flag: The E-flag can be altered by instructions, which perform ALU or data movement operations. The E-flag is cleared by those instructions which cannot be reasonably used for table search operations. In all other cases the E-flag is set depending on the value of the source operand to signify whether the end of a search table is reached or not. If the value of the source operand of an instruction equals the lowest negative number, which is representable by the data format of the corresponding instruction (‘8000H’ for the word data type, or ‘80H’ for the byte data type), the E-flag is set to ‘1’, otherwise it is cleared. MULIP-Flag: The MULIP-flag will be set to ‘1’ by hardware upon the entrance into an interrupt service routine, when a multiply or divide ALU operation was interrupted before completion. Depending on the state of the MULIP bit, the hardware decides whether a multiplication or division must be continued or not after the end of an interrupt service. The MULIP bit is overwritten with the contents of the stacked MULIP-flag when the return-from-interrupt-instruction (RETI) is executed. This normally means that the MULIP-flag is cleared again after that. Table 4-2 Shift Right Rounding Error Evaluation C-flag V-flag Rounding Error Quantity 0 0 1 1 0 1 0 1 – No rounding error – 0 < Rounding error < 1/2 LSB Rounding error = 1/2 LSB Rounding error > 1/2 LSB |
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