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6V7 Datasheet(PDF) 182 Page - Renesas Technology Corp |
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6V7 Datasheet(HTML) 182 Page - Renesas Technology Corp |
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182 / 298 page ![]() Rev.1.00 May 18, 2004 page 182 of 296 M306V7MG/MH/MJ/MJA-XXXFP, M306V7FG/FH/FJ/FJAFP Figure 2.16.4 Block control register i (i = 0 to 16) b7 4 b3 b2 b1 b0 i Display mode selection bits Dot size selection bits Pre-divide ratio selection bits b2 b1 b0 Functions 0 0 0 Display OFF 0 0 1 OSDS mode (No bordered) 0 1 0 CC mode 0 1 1 CDOSD mode 1 0 0 OSDP mode (No bordered) 1 0 1 OSDS mode (Bordered) 1 1 0 OSDP mode (Bordered) 1 1 1 OSDL mode Bit name F unction RW Notes 1: Tc is OSD clock cycle divided in pre-divide circuit 2: H is HSYNC 3: This character size is available only in Layer 2. At this time, set layer 1’s pre-divide ratio = ✕ 2, layer 1’s horizontal dot size = 1Tc. 4: In OSDL and OSDP modes, 1.5Tc size cannot be used. b6 b5 b4 b3 Pre-divide Dot size 0 0 1 1 0 0 1 1 0 0 0 0 1 1 0 1 1 1 ✕ 1 ✕ 2 ✕ 3 1Tc ✕ 1/2H 1Tc ✕ 1H 2Tc ✕ 2H 3Tc ✕ 3H 1Tc ✕ 1/2H 1Tc ✕ 1H 2Tc ✕ 2H 3Tc ✕ 3H 1.5Tc ✕ 1/2H (See notes 3, 4) 1.5Tc ✕ 1H (See notes 3, 4) 1Tc ✕ 1/2H 1Tc ✕ 1H 2Tc ✕ 2H 3Tc ✕ 3H 0 0 1 1 0 1 0 1 0 1 0 1 0 1 0 1 0 1 Nothing is assigned. In an attempt to write to this bit, write “0.” The value, if read, turns out to be indeterminate. Bit symbol BCi_0 BCi_3 BCi_5 BCi_1 BCi_2 BCi_4 BCi_6 Symbo Address 021016 to 021F16 l BCi (i = 1 to 16) When reset Indeterminate ratio |
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