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M37274EFSP Datasheet(PDF) 41 Page - Renesas Technology Corp |
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M37274EFSP Datasheet(HTML) 41 Page - Renesas Technology Corp |
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41 / 148 page ![]() 40 SINGLE-CHIP 8-BIT CMOS MICROCOMPUTER with CLOSED CAPTION DECODER and ON-SCREEN DISPLAY CONTROLLER M37274EFSP PRELIMINARY Notice: This is not a final specification. Some paramentic limits are subject to change. MITSUBISHI MICROCOMPUTERS Fig. 35. Sync Slice Register (1) Clamping Circuit and Low-pass Filter This filter attenuates the noise of the composite video signal input from the CVIN pin. The CVIN pin to which composite video signal is input requires a capacitor (0.1 µF) coupling outside. Pull down the CVIN pin with a resistor of hundreds of kiloohms to 1 M . In addition, we recommend to install externally a simple low-pass filter using a resistor and a capacitor at the CVIN pin (refer to Figure 25). (2) Sync Slice Circuit This circuit takes out a composite sync signal from the output signal of the low-pass filter. Figure 25 shows the structure of the sync slice register. b7 b6 b5 b4 b3 b2 b1 b0 Sync slice register (SSL) [Address 00E3 16] Sync Slice Register 7 0R W 0R W Vertical synchronous signal (Vsep) generating method selection bit (SSL7) 0, 2 Fix these bits to “1.” B After reset Functions Name RW 0: Method 1 1: Method 2 0001 01 0R W 1, 3 to 6 Fix these bits to “0.” 0 |
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