M37274EFSP datasheet(27/148 Pages) RENESAS

27 / 148 page

SINGLE-CHIP 8-BIT CMOS MICROCOMPUTER with CLOSED CAPTION DECODER

and ON-SCREEN DISPLAY CONTROLLER

M37274EFSP

PRELIMINARY

Notice:

This

is not

a final

specification.

Some

paramentic

limits

are

subject

to change.

MITSUBISHI MICROCOMPUTERS

Internal clock : The serial I/O counter is set to “7” during the write

cycle into the serial I/O register (address 021416), and the transfer

clock goes “H” forcibly. At each falling edge of the transfer clock after

the write cycle, serial data is output from the SOUT pin. Transfer di-

rection can be selected by bit 5 of the serial I/O mode register. At

each rising edge of the transfer clock, data is input from the SIN pin

and data in the serial I/O register is shifted 1 bit.

After the transfer clock has counted 8 times, the serial I/O counter

becomes “0” and the transfer clock stops at HIGH. At this time the

interrupt request bit is set to “1.”

Fig. 20. Serial I/O Timing (for LSB first)

Synchronous clock

Transfer clock

Serial I/O register

write signal

Serial I/O output

SOUT

(Note)

Serial I/O input

SIN

Note : When an internal clock is selected, the S OUT pin is at high-impedance after transfer is completed.

Interrupt request bit is set to “1”

External clock : The an external clock is selected as the clock source,

the interrupt request is set to “1” after the transfer clock has been

counted 8 counts. However, transfer operation does not stop, so the

clock should be controlled externally. Use the external clock of 500kHz

or less with a duty cycle of 50%.

The serial I/O timing is shown in Figure 20. When using an external

clock for transfer, the external clock must be held at HIGH for initial-

izing the serial I/O counter. When switching between an internal clock

and an external clock, do not switch during transfer. Also, be sure to

initialize the serial I/O counter after switching.

Notes 1: On programming, note that the serial I/O counter is set by

writing to the serial I/O register with the bit managing in-

structions, such as SEB and CLB.

2: When an external clock is used as the synchronous clock,

write transmit data to the serial I/O register when the trans-

fer clock input level is HIGH.

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