| Electronic Components Datasheet Search |
|
HD64F36034 Datasheet(PDF) 332 Page - Renesas Technology Corp |
|
|
|||||||||||||||||||||||||||||
HD64F36034 Datasheet(HTML) 332 Page - Renesas Technology Corp |
|
332 / 592 page ![]() Section 15 Controller Area Network for Tiny (TinyCAN) Rev. 4.00 Mar. 15, 2006 Page 300 of 556 REJ09B0026-0400 15.3.2 Master Control Register (MCR) MCR controls a transition request to halt mode and a software reset request. Bit Bit Name Initial Value R/W Description 7 to 2 — All 0 R/W Reserved These bits are always read as 0. 1 HLTRQ 0 R/W Halt Request Halts communication between the TinyCAN and CAN bus. Communication with the CAN bus can be resumed by clearing this bit to 0 and then receiving 11 recessive bits. 0: TinyCAN in normal mode 1: Halt mode is requested 0 RSTRQ 1 R/W Reset Request Controls a software reset of the TinyCAN. After a reset has been requested and the initial state is entered, both the RESET bit in GSR and the RHI bit in TCIRR0 are set to 1. When this bit is cleared to 0, communication with the CAN bus is resumed. After powering on, this bit and the RESET bit are always set to 1. 0: TinyCAN in normal mode 1: Software reset of TinyCAN is requested |
|
Link URL |
| Does ALLDATASHEET help your business so far? [ DONATE ] |
About Alldatasheet | Advertisement | Contact us | Privacy Policy | Link to Datasheet | Link Exchange | Manufacturer List All Rights Reserved©Alldatasheet.com |
| Russian : Alldatasheetru.com | Korean : Alldatasheet.co.kr | Spanish : Alldatasheet.es | French : Alldatasheet.fr | Italian : Alldatasheetit.com Portuguese : Alldatasheetpt.com | Polish : Alldatasheet.pl | Vietnamese : Alldatasheet.vn Indian : Alldatasheet.in | Mexican : Alldatasheet.com.mx | British : Alldatasheet.co.uk | New Zealand : Alldatasheet.co.nz |
|
Family Site : ic2ic.com |
icmetro.com |