HD64F36034 datasheet(328/592 Pages) RENESAS

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Section 15 Controller Area Network for Tiny (TinyCAN)

Rev. 4.00 Mar. 15, 2006 Page 296 of 556

REJ09B0026-0400

• Other features

Standby mode can be cleared by falling edge detection of the HRXD pin.

The block diagram of the TinyCAN is shown in figure 15.1.

HTXD

CDLC

Mailboxes

MCn0, MCn4

to MCn7

(n = 0 to 3)

LAFMn

(n = 0 to 3)

Interrupt generator

Interrupt request

Port control

MDn0 to

MDn7

(n = 0 to 3)

Temporary

buffer

REC

TEC

BCR0/1

MBCR

TXPR

TXCR

TXACK

ABACK

MCR

GSR

TCR

TCIRR0/1

TCIMR0/1

TCMR

RXPR

RFPR

UMSR

MBIMR

HRXD

[Legend]

MCR:

GSR:

TCR:

TCIRR0/1:

TCIMR0/1:

MBCR:

TXPR:

TXCR:

TXACK:

ABACK:

RXPR:

RFPR:

Master control register

General status register

Test control register

TinyCAN interrupt register 0/1

TinyCAN interrupt mask register 0/1

Mailbox configuration register

Transmit pending register

Transmit pending cancel register

Transmit acknowledge register

Abort acknowlege register

Data frame receive complete register

Remote request register

Unread message status register

Mailbox interrupt mask register

Bit configuration register 0/1

Transmit error counter

Receive error counter

Local acceptance filter mask (n = 0 to 3)

Message control (n = 0 to 3)

Message data (n = 0 to 3)

TinyCAN module control register

CAN data link controller

The CDLC conforms to the Bosch CAN Ver. 2.0B active

standard, and performs transmission and reception

of messages, CRC checking, bus arbitration, etc.

UMSR:

MBIMR:

BCR0/1:

TEC:

REC:

LAFMn:

MCn0, MCn4 to

MCn7:

MDn0 to MDn7:

TCMR:

CDLC:

Figure 15.1 TinyCAN Block Diagram

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