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HD64F36034 Datasheet(PDF) 336 Page - Renesas Technology Corp |
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HD64F36034 Datasheet(HTML) 336 Page - Renesas Technology Corp |
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336 / 592 page ![]() Section 15 Controller Area Network for Tiny (TinyCAN) Rev. 4.00 Mar. 15, 2006 Page 304 of 556 REJ09B0026-0400 15.3.5 Bit Configuration Registers 0, 1 (BCR0, BCR1) BCR configures the CAN bit timing parameters and baud rate prescaler for the CDLC. • BCR0 Bit Bit Name Initial Value R/W Description 7 6 SJW1 SJW0 0 0 R/W R/W Re-Synchronization Jump Width These bits set the maximum value of synchronization width. 00: 1 time quantum 01: 2 time quanta 10: 3 time quanta 11: 4 time quanta 5 4 3 2 1 0 BRP5 BRP4 BRP3 BRP2 BRP1 BRP0 0 0 0 0 0 0 R/W R/W R/W R/W R/W R/W Baud Rate Prescaler These bits set the clock used for time quanta. 000000: Setting prohibited 000001: 2 system clocks : : (BRP + 1) system clocks 111111: 64 system clocks • BCR1 Bit Bit Name Initial Value R/W Description 7 0 Reserved This bit is always read as 0. The write value should always be 0. |
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