HD64F36022 datasheet(145/384 Pages) RENESAS

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Section 10 Timer V

Rev. 4.00 Sep. 23, 2005 Page 119 of 354

REJ09B0025-0400

10.2

Input/Output Pins

Table 10.1 shows the timer V pin configuration.

Table 10.1

Pin Configuration

Name

Abbreviation I/O

Function

Timer V output

TMOV

Output

Timer V waveform output

Timer V clock input

TMCIV

Input

Clock input to TCNTV

Timer V reset input

TMRIV

Input

External input to reset TCNTV

Trigger input

TRGV

Input

Trigger input to initiate counting

10.3

Time V has the following registers.

• Timer counter V (TCNTV)

• Timer constant register A (TCORA)

• Timer constant register B (TCORB)

• Timer control register V0 (TCRV0)

• Timer control/status register V (TCSRV)

• Timer control register V1 (TCRV1)

10.3.1

Timer Counter V (TCNTV)

TCNTV is an 8-bit up-counter. The clock source is selected by bits CKS2 to CKS0 in timer

control register V0 (TCRV0). The TCNTV value can be read and written by the CPU at any time.

TCNTV can be cleared by an external reset input signal, or by compare match A or B. The

clearing signal is selected by bits CCLR1 and CCLR0 in TCRV0.

When TCNTV overflows, OVF is set to 1 in timer control/status register V (TCSRV).

TCNTV is initialized to H'00.

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