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HD64F36022 Datasheet(PDF) 324 Page - Renesas Technology Corp |
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HD64F36022 Datasheet(HTML) 324 Page - Renesas Technology Corp |
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324 / 384 page ![]() Appendix Rev. 4.00 Sep. 23, 2005 Page 298 of 354 REJ09B0025-0400 7. System control instructions Mnemonic Addressing Mode and Instruction Length (bytes) No. of States *1 Condition Code IH N Z V C TRAPA #x:2 RTE SLEEP LDC #xx:8, CCR LDC Rs, CCR LDC @ERs, CCR LDC @(d:16, ERs), CCR LDC @(d:24, ERs), CCR LDC @ERs+, CCR LDC @aa:16, CCR LDC @aa:24, CCR STC CCR, Rd STC CCR, @ERd STC CCR, @(d:16, ERd) STC CCR, @(d:24, ERd) STC CCR, @–ERd STC CCR, @aa:16 STC CCR, @aa:24 ANDC #xx:8, CCR ORC #xx:8, CCR XORC #xx:8, CCR NOP Operation PC → @–SP CCR → @–SP <vector> → PC CCR ← @SP+ PC ← @SP+ Transition to power- down state #xx:8 → CCR Rs8 → CCR @ERs → CCR @(d:16, ERs) → CCR @(d:24, ERs) → CCR @ERs → CCR ERs32+2 → ERs32 @aa:16 → CCR @aa:24 → CCR CCR → Rd8 CCR → @ERd CCR → @(d:16, ERd) CCR → @(d:24, ERd) ERd32–2 → ERd32 CCR → @ERd CCR → @aa:16 CCR → @aa:24 CCR ∧#xx:8 → CCR CCR ⁄#xx:8 → CCR CCR ⊕#xx:8 → CCR PC ← PC+2 — — — B B W W W W W W B W W W W W W B B B — 2 2 2 2 2 2 4 4 6 10 6 10 4 4 6 8 6 8 2 2 1 — — — — — — — — — 10 2 2 2 6 8 12 8 8 10 2 6 8 12 8 8 10 2 2 2 2 — — — — — — — — — — — — — — — — — — — — — — — — — — — — — — — — — — — — — — — — — — — — — — — — — — 14 16 TRAPA RTE SLEEP LDC STC ANDC ORC XORC NOP |
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