SH7670 datasheet(41/1292 Pages) RENESAS

41 / 1292 page

Section 1 Overview

Rev. 1.00 Nov. 14, 2007 Page 15 of 1262

REJ09B0437-0100

Classification Symbol

I/O Name

Function

NMI

Non-maskable

interrupt

Non-maskable interrupt request pin.

Fix it high when not in use.

Interrupts

IRQ7 to IRQ0

Interrupt requests

7 to 0

Maskable interrupt request pins

Level-input or edge-input detection

can be selected. When the edge-input

detection is selected, the rising edge

or falling edge can also be selected.

Address bus

A25 to A00

Address bus

Addresses are output on these pins.

Data bus

D31 to D00

I/O Data bus

Bidirectional data bus pins

CS0, CS3 to CS6 O Chip select 0, 3 to

Chip-select signal pins for external

memory or devices

Read

Indicates that data is read from an

external device.

RD/

Read/write

Read/write signal pin

Bus start

Bus cycle start signal pin

WE3

Most significant

byte write

Indicates that data is written to data

bits 31 to 24 of the external memory or

device.

WE2

Second byte write Indicates that data is written to data

bits 23 to 16 of the external memory or

device.

WE1

Third byte write

Indicates that data is written to data

bits 15 to 8 of the external memory or

device.

WE0

Least significant

byte write

Indicates that data is written to data

bits 7 to 0 of the external memory or

device.

WAIT

Wait

Input pin to insert a wait cycle into bus

cycles during access to the external

space

RAS

Pin connected to the

RAS pin of

SDRAM

CAS

Pin connected to the

CAS pin of

SDRAM

CKE

Clock enable

Pin connected to the CKE pin of

SDRAM

Bus control

DQMUU

Most significant

byte select

Selects data bus bits 31 to 24 of

SDRAM.

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