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SH7670 Datasheet(PDF) 31 Page - Renesas Technology Corp |
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SH7670 Datasheet(HTML) 31 Page - Renesas Technology Corp |
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31 / 1292 page  Section 1 Overview Rev. 1.00 Nov. 14, 2007 Page 5 of 1262 REJ09B0437-0100 Classification Module/Function Description External bus extension Bus state controller (BSC) • Address space for five areas (64 Mbytes each) and 32-bit external bus • The following features settable independently for each area: Bus size: 8, 16, or 32 bits (depending on area) Access wait cycle count Idle wait cycle setting (same area/different area) Supports SRAM, SRAM with byte selection, and SDRAM by specifying memory to be connected for each area Supports the PCMCIA interface Chip select signal output to an applicable area (Timings of CS asserting and negating are selectable by programming) • SDRAM refreshing function Supports auto-refreshing mode and self-refreshing mode • SDRAM burst access function DMA Direct memory access controller (DMAC) • Eight channels (External DMA requests available for two of them) • Can be activated by on-chip peripheral modules • Burst mode and cycle steal mode • Supports intermittent mode (16 or 64 cycles) • Auto-reloading of transfer information |
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