SH7670 datasheet(25/1292 Pages) RENESAS

25 / 1292 page

Rev. 1.00 Nov. 14, 2007 Page xxv of xxvi

25.3.3

Break on Data Access Cycle........................................................................... 1076

25.3.4

Value of Saved Program Counter ................................................................... 1077

25.3.5

Usage Examples.............................................................................................. 1078

25.4

Usage Notes .................................................................................................................... 1081

Section 26 High-Performance User Debugging Interface (H-UDI) ................1083

26.1

Features........................................................................................................................... 1083

26.2

Input/Output Pins ............................................................................................................ 1084

26.3

Register Descriptions ...................................................................................................... 1085

26.3.1

Bypass Register (SDBPR) .............................................................................. 1085

26.3.2

Instruction Register (SDIR) ............................................................................ 1086

26.4

Operation ........................................................................................................................ 1087

26.4.1

TAP Controller ............................................................................................... 1087

26.4.2

Reset Configuration ........................................................................................ 1088

26.4.3

TDO Output Timing ....................................................................................... 1089

26.4.4

H-UDI Reset ................................................................................................... 1090

26.4.5

H-UDI Interrupt .............................................................................................. 1090

26.5

Usage Notes .................................................................................................................... 1091

Section 27 On-Chip RAM ...............................................................................1093

27.1

Features........................................................................................................................... 1093

27.2

Usage Notes .................................................................................................................... 1094

27.2.1

Page Conflict................................................................................................... 1094

27.2.2

RAME and RAMWE Bits .............................................................................. 1094

Section 28 List of Registers .............................................................................1095

28.1

(by Functional Module, in Order of the Manual's Section Numbers) ............................. 1096

28.2

Register Bits.................................................................................................................... 1114

28.3

Section 29 Electrical Characteristics .................................................................1171

29.1

Absolute Maximum Ratings ........................................................................................... 1171

29.2

Power-on/Power-off Sequence ....................................................................................... 1172

29.3

DC Characteristics .......................................................................................................... 1173

29.4

AC Characteristics .......................................................................................................... 1181

29.4.1

Clock Timing .................................................................................................. 1182

29.4.2

Control Signal Timing .................................................................................... 1186

29.4.3

Bus Timing ..................................................................................................... 1187

29.4.4

DMAC Module Timing .................................................................................. 1216

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